Addressing Modes Of 8051 The way by which

Addressing Modes Of 8051

“ The way by which operand is specified with instruction is called addressing mode. ” v There are mainly five types of addressing modes in 8051. 1) Register Addressing Mode 2) Immediate Addressing Mode 3) Direct Addressing Mode 4) Register Indirect Addressing Mode 5) Indexed Addressing Mode

Register Addressing Mode Use of register to hold the data to be manipulated Operand: - Register Ex. : - MOV A, R 0 ADD A, R 5

A ? A 10 h R 0 10 h MOV A, R 0 10 h

Immediate Addressing Mode Ø Used to immediately transfer operand to destination register Ø Immediate data must be preceded by ‘#’ pound sign Operand: - 8 - bit / 16 - bit number Ex. : - MOV A, #20 h ADD A, #87 h MOV DPTR, #0200 h

A ? A MOV A, #18 h 18 h

Direct Addressing Mode Ø Operand: - 8 - bit RAM address Ex. : - MOV A, #20 h MOV DPTR, #0200 h ADD A, #87 h

A ? A 09 h 25 h 10 h MOV A, 25 h 09 h

Register Indirect Addressing Mode Ø Operand: - 8 - bit RAM address Ex. : - MOV A, #20 h MOV DPTR, #0200 h ADD A, #87 h

A ? A 09 h MOV A, @R 1 25 h 09 h 25 h 09 h

Indexed Addressing Mode Ø Operand: - 8 - bit RAM address Ex. : - MOV A, #20 h MOV DPTR, #0200 h ADD A, #87 h

A 00 h A 39 h MOV A, @A+DPTR 0200 h 39 h 0200 h 39 h

MOV Instruction

MOV Operand 1, Operand 2 Function: - Move Byte Variable Description: - Copies the value of operan 2 in to operand 1 Ø Value of operand 2 is not affected Ø Both operand 1 and operand 2 must be in internal RAM Flag: - No Flags are affected

MOV A, Rn (n=0, 1…. 7) Description: - Copies content of destination reg. Rn (n = 0, 1… 7) into reg. A(Accumulator) Byte: - Single Add. Mode: - Register Ex. : - MOV A, R 0 Before Execution (I/P) After Execution (O/P) A=? A = 15 h R 0 = 15 h

MOV A, #8 -bit Data Description: - Move immediate 8 -bit data into reg. A(Accumulator) Byte: - Two Add. Mode: - Immediate Ex. : - MOV A, #20 h Before Execution (I/P) A=? 20 h After Execution (O/P) A = 20 h

MOV A , Direct Description: - Copies content of RAM location into reg. A(Accumulator) Byte: - Two Add. Mode: - Direct Ex. : - MOV A, 20 h Before Execution (I/P) After Execution (O/P) A=? A = 05 h 20 h = 05 h

MOV A , @Ri (i= 0, 1) Description: - Copies content of RAM location which is stored in reg. Ri (i= 0, 1) into reg. A(Accumulator) Byte: - Single Add. Mode: - Register Indirect Ex. : - MOV A, @R 0 Before Execution (I/P) After Execution (O/P) A=? A = 05 h R 0 =20 h = 05 h

MOV Rn, A (n= 0, 1… 7) Description: - Copies content of reg. A into destination reg. Rn (n = 0, 1… 7) Byte: - Single Add. Mode: - Register Ex. : - MOV R 1, A Before Execution (I/P) After Execution (O/P) A = 15 h R 1 = ? R 1 = 15 h

MOV Rn, #8 -bit Data Description: - Move immediate 8 -bit data into destination reg. Rn Byte: - Two Add. Mode: - Immediate Ex. : - MOV R 2, #20 h Before Execution (I/P) R 2= ? 20 h After Execution (O/P) R 2= 20 h

MOV Rn , Direct Description: - Copies content of RAM location into destination Reg. Rn Byte: - Two Add. Mode: - Direct Ex. : - MOV R 3, 20 h Before Execution (I/P) After Execution (O/P) R 3 = ? R 3 = 05 h 20 h = 05 h

MOV Direct, A Description: - Copies content of reg. A into destination RAM location Byte: - Single Add. Mode: - Direct Ex. : - MOV 30 h, A Before Execution (I/P) After Execution (O/P) A = 04 h 30 h = ? 30 h = 04 h

MOV Direct, Rn Description: - Copies content of source reg. Rn into destination RAM location Byte: - Single Add. Mode: - Direct Ex. : - MOV 30 h, R 4 Before Execution (I/P) After Execution (O/P) R 4= 08 h R 4 = 08 h 30 h = ? 30 h = 08 h

MOV Direct, #8 -bit Data Description: - Move immediate 8 -bit data into destination RAM location Byte: - Two Add. Mode: - Immediate Ex. : - MOV 35 h, #20 h Before Execution (I/P) 35 h= ? 20 h After Execution (O/P) 35 h= 20 h

MOV Direct, Direct Description: - Copies content of Source RAM location into destination RAM location Byte: - Single Add. Mode: - Direct Ex. : - MOV 35 h, 20 h Before Execution (I/P) After Execution (O/P) 35 h= ? 35 h = 05 h 20 h = 05 h

MOV Direct, @Ri (i= 0, 1) Description: - Copies content of RAM location which is stored in reg. Ri ( i= 0, 1) into destination RAM location Byte: - Single Add. Mode: - Register Indirect Ex. : - MOV 25 h, @R 0 Before Execution (I/P) After Execution (O/P) 25 h = ? 25 h = 05 h R 0 =20 h = 05 h R 0=20 h = 05 h

MOV @Ri , A Description: - Copies content of reg. A into destination RAM location which is stored in reg. Ri (i= 0, 1) Byte: - Single Add. Mode: - Register Indirect Ex. : - MOV @R 0, A Before Execution (I/P) After Execution (O/P) A = 15 h R 0 =20 h = ? R 0 =20 h = 15 h

MOV @Ri, #8 -bit Data Description: - Move immediate 8 -bit data into destination RAM location which is stored in reg. Ri ( i=0, 1) Byte: - Two Add. Mode: - Immediate Ex. : - MOV @Ri, #20 h Before Execution (I/P) R 1 = 35 h= ? 20 h After Execution (O/P) R 1 =35 h= 20 h

MOV @Ri, Direct Description: - Copies content of RAM location into destination RAM location which is stored in reg. Ri ( i= 0, 1) Byte: - Single Add. Mode: - Register Indirect Ex. : - MOV @R 0, 25 h Before Execution (I/P) After Execution (O/P) 25 h = 03 h R 0 =20 h = ? R 0=20 h = 03 h

MOV DPTR, #16 -Bit Data Description: - Move 16 -bit data immediately to DPTR (Data Pointer) Reg. Byte: - Three Add. Mode: - Immediate Ex. : - MOV DPTR, #1234 Before Execution (I/P) After Execution (O/P) DPTR = ? DPTR = 1234 H (DPH = 12 h DPL = 34 h) 1234 h

MOVC A, @A+DPTR Description: - Content of Code memory is copied in to accumulator Ø Content of DPTR is added with content of accumulator to form code memory address. Byte: - One Add. Mode: - Register Indirect

Ex. : - MOVC A, @A+DPTR Before Execution (I/P) After Execution (O/P) A = 00 h A = 15 h DPTR = 0200 h = 15 h Before Execution (I/P) After Execution (O/P) A = 02 h A = 11 h DPTR = 0200 h 0202 h = 11 h

MOVX A, @DPTR Function: - The MOVX instructions transfer data between the Accumulator and a byte of external data memory. Description: - Content of external data memory which is stored in DPTR reg. copied into reg. A Byte: - One Add. Mode: - Register Indirect

Ex. : - MOVX A, @DPTR Before Execution (I/P) After Execution (O/P) A=? A = 15 h DPTR = 0200 h = 15 h

MOVX @DPTR, A Description: - Content of reg. A is copied in to external data memory whose address is stored into DPTR reg. Byte: - One Add. Mode: - Register Indirect Before Execution (I/P) After Execution (O/P) A = 25 h A = 15 h DPTR = 0200 h = ? 0200 h = 15 h

XCH A, Byte Function: - Exchange A with a byte variable Description: - used to exchange content of reg. A and content of source byte. (Source byte can be any registers or RAM location) Flag: - None

Ex. : - XCH A, R 0 Before Execution (I/P) After Execution (O/P) A = 65 h A = 79 h R 0 = 65 h (1)XCH A, Rn (2)XCH A, Direct (3)XCH A, @Ri

XCHD A, @Ri Function: - Exchange digit Description: - exchanges only the lower nibble of A with lower nibble of RAM location pointed by Ri without affecting upper nibble. Flag: - None Ex. : XCHD A, @R 0 Before Execution (I/P) After Execution (O/P) A = 65 h A = 69 h R 0 = 40 h= 75 h

Arithmetic Instructions

ADD A, Rn (n=0, 1…. 7) Description: - Add content of destination reg. Rn (n = 0, 1… 7) with content of accumulator with out carry Ø After performing operation result is stored in accumulator. Byte: - Single Add. Mode: - Register Ex. : - ADD A, R 0 Before Execution (I/P) After Execution (O/P) A = 05 h A = 08 h R 0 = 03 h

ADD A, #8 -bit data Description: - Add 8 -bit data immediately with content of accumulator without carry Ø After performing operation result is stored in accumulator. Byte: - Two Ex. : - ADD A, #09 h Add. Mode: - Immediate Before Execution (I/P) A = 06 h 09 h After Execution (O/P) A = 0 Fh

ADD A, Direct Description: - Add content of destination RAM address with content of accumulator with out carry Ø After performing operation result is stored in accumulator. Byte: - Single Add. Mode: - Direct Ex. : - ADD A, 35 h Before Execution (I/P) After Execution (O/P) A = 05 h A = 0 Ah 35 h = 05 h 35 h = 03 h

ADD A, @Ri (i=0, 1) Description: - Add content of destination RAM location which stored in reg. Ri (i=0, 1) with content of accumulator with out carry Ø After performing operation result is stored in accumulator. Byte: - Single Add. Mode: - Register Indirect Ex. : - ADD A, @R 0 Before Execution (I/P) After Execution (O/P) A = 05 h A = 07 h R 0 = 20 h = 02

ADDC A, Rn (n=0, 1…. 7) Description: - Add content of destination reg. Rn (n = 0, 1… 7) with content of accumulator with status of carry flag Ø After performing operation result is stored in accumulator. Byte: - Single Add. Mode: - Register

Ex. : - ADDC A, R 4 (A = A + R 4 + CY) Before Execution (I/P) After Execution (O/P) A = 05 h R 4= 03 h A = 09 h Cy = 1 2) ADDC A, #8 -bit data 3) ADDC A, Direct 4) ADDC A, @Ri (i = 0, 1)

SUBB A, Rn (n=0, 1…. 7) Description: - Subtract content of destination reg. Rn (n = 0, 1… 7) with content of accumulator with status of carry flag Ø After performing operation result is stored in accumulator. Byte: - Single Add. Mode: - Register

Ex. : - SUBB A, R 5 (A = A – R 5 – CY) Before Execution (I/P) After Execution (O/P) A = 05 h R 5= 03 h A = 01 h Cy = 1 2) SUBB A, #8 -bit data 3) SUBB A, Direct 4) SUBB A, @Ri (i = 0, 1)

INC A (Increment) Description: - Increment content of accumulator by 1 Ø After performing operation result is stored in accumulator. Byte: - Single Add. Mode: - Register Ex. : - INC A (A = A+1) Before Execution (I/P) After Execution (O/P) A = 05 h A = 06 h

INC Rn (Increment) Description: - Increment content of reg. Rn (n =0 , 1…. . 7) by 1 Ø After performing operation result is stored in reg. Rn. Byte: - Single Ex. : - INC R 6 (R 6 = R 6+1) Add. Mode: - Register Before Execution (I/P) After Execution (O/P) R 6= 09 h R 6 = 0 Ah

INC @Ri (Increment) Description: - Increment content of 8 -bit RAM location which is stored in reg. R 0 0 r R 1 by 1 Byte: - Single Add. Mode: - Register Indirect Ex. : - INC @R 1 Before Execution (I/P) After Execution (O/P) R 1 = 25 h R 1= 25 h = 07 h 25 h = 08 h

INC Direct (Increment) Description: - Increment content of 8 -bit RAM location by 1 Ø After performing operation result is stored in RAM location Byte: - Single Add. Mode: - Direct Ex. : - INC 20 h Before Execution (I/P) After Execution (O/P) 20 h= 03 h 20 h= 04 h

INC DPTR (Increment) Description: - Increment content of 16 -bit Data pointer reg. by 1 Byte: - Three Add. Mode: - Register Ex. : - INC DPTR Before Execution (I/P) After Execution (O/P) DPTR = 0200 h DPTR = 0201 h

Decrement v DEC A v DEC Rn (n = 0, 1 ……… , 7) v DEC direct v DEC @Ri (I = 0, 1)

MUL AB (Multiplication) Description: - Multiply 8 -bit contents of accumulator and reg. B Ø After performing operation 16 -bit result store in reg. A & reg. B LSB of result store in reg. A MSB of result store in reg. B Byte: - Single Add. Mode: - Register

Ex. : - MUL AB Before Execution (I/P) After Execution (O/P) A = 04 h A = 08 h B = 02 h B = 00 h

DIV AB (Division) Description: - Divide 8 -bit contents of accumulator by 8 -bit content of reg. B Ø After performing operation Quotient store in reg. A and remainder store in reg. B Byte: - Single Add. Mode: - Register

Ex. : - DIV AB Before Execution (I/P) After Execution (O/P) A = 05 h A = 02 h B = 01 h

DA A Function: -Decimal adjust accumulator after addition Description: - used after addition of BCD numbers to convert the result back to BCD. The data is adjust in following two possible cases. (1)Add 6 to lower 4 -bit of A if it is >9 (2)Add 6 to upper 4 -bit of A if it is >9 Byte: - Single Flag: - CY

Ex. : MOV A, #47 h ADD A, #38 h DA A 47 h + + 38 h 7 Fh (invalid BCD) 06 h (after DA A) 85 h (Valid BCD)

LOGICAL INSTRUCTION

ANL A, Rn (Logical AND Operation) Description: - Performs the bitwise logical AND operation between source operand (Rn) and destination operand (A) Ø After performing operation result store in destination operand Byte: - Single Add. Mode: - Register AND gate Truth table A B Y 0 0 1 1 1

Ex. : - ANL A, R 0 Before Execution (I/P) After Execution (O/P) A = 0 Fh A = 05 h B = 25 h Ø ANL instruction is used for MASKING operation. Ø Anding with 0 Fh to mask lower nibble Ø Anding with F 0 h to mask upper nibble

Other format of ANL instructions 1) ANL A, # 8 -bit data 2) ANL A, Direct 3) ANL A, @Ri (i = 0, 1) 4) ANL Direct, A 5) ANL Direct, #8 -bit data

ORL A, Direct (Logical OR Operation) Description: - Performs the bitwise logical OR operation between source operand (8 -bit RAM location) and destination operand (A) Ø After performing operation result store in destination operand Byte: - Single Add. Mode: - Register OR gate Truth table A B Y 0 0 1 1 1 0 1 1

Ex. : - ORL A, 30 h Before Execution (I/P) After Execution (O/P) A = 05 h A = 25 h 30 h = 20 h 1) 2) 3) 4) 5) ORL ORL ORL A, Rn A, # 8 -bit data A, @Ri Direct, A Direct, # 8 -bit data

XRL A, @Ri (Logical XOR Operation) Description: - Performs the bitwise logical exclusive OR operation between source operand (8 -bit RAM location store in R 0 or R 1 reg. ) and destination operand (A) Ø After performing operation result store in destination operand XOR gate Truth table Byte: - Single A B Y 0 0 0 Add. Mode: - Register 0 1 1 1 0

Ex. : - XRL A, @R 1 Before Execution (I/P) After Execution (O/P) A = 35 h A = A 2 h R 1 = 30 h = 97 h 1) 2) 3) 4) 5) XRL XRL XRL A, Rn A, #8 -bit data A, Direct, A Direct, #8 -bit data

RL A (Rotate Left without carry) Description: - The eight bits in the Accumulator are rotated one bit to the left. Ø Bit 7 is rotated into the bit 0 position Byte: - Single Add. Mode: - Register D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0

RLC A (Rotate Left with carry) Description: - The eight bits in the Accumulator are rotated one bit to the left. Ø Bit 7 moves into CY flag and original status of Cy flag moves into bit 0 position Byte: - Single Add. Mode: - Register CY D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0

RR A (Rotate Right without carry) Description: - The eight bits in the Accumulator are rotated one bit to the right position. Ø Bit 0 moves into the bit 7 position Byte: - Single Add. Mode: - Register D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0

RRC A (Rotate Right with carry) Description: - The eight bits in the Accumulator are rotated one bit to the right position. Ø Bit 0 moves into CY flag and original status of Cy flag moves into bit 7 position Byte: - Single Add. Mode: - Register CY D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0

CLR A (Clear Accumulator) Description: - Clear content of accumulator Byte: - Single Add. Mode: - Register Ex. : - CLR A Before Execution (I/P) After Execution (O/P) A = 05 h A = 00 h

CPL A (Complement Accumulator) Description: - Logically complement each bit of accumulator Byte: - Single Add. Mode: - Register Ex. : - CPL A Before Execution (I/P) After Execution (O/P) A = 05 h A = FAh

SWAP A Description: - interchange lower and upper nibble of accumulator Byte: - Single Add. Mode: - Register Ex. : - SWAP A Before Execution (I/P) After Execution (O/P) A = 05 h A = 50 h

Boolean Variable Manipulation

CLR bit (Clear Bit) Description: - instruction used to clear indicated bit (Reset to 0) Byte: - Single Ex. : - CLR C (Clear CY flag) CLR acc. 0 (Clear bit 0 of accumulator) CLR P 1. 5 (Clear bit 5 of port 1)

STEB bit (Set Bit) Description: - instruction used to set indicated bit (set to 1) Byte: - Single Ex. : - SETB C (Set CY flag) (CY = 1) SETB acc. 4 (Set bit 4 of accumulator) SETB P 2. 0 (Set bit 0 of port 2) (P 2. 0 = 1)

CPL bit (Complement Bit) Description: - instruction used to complement indicated bit (Change 1 to 0 & 0 to 1) Byte: - Single Ex. : - CPL C (Complement CY flag) CPL acc. 4 (Complement bit 4 of accumulator) CPL P 2. 0 (Complement bit 0 of port 2)

ANL C, Source bit Function: - Logical AND for bit variable Description: - Cy flag bit is ANDed with a source bit and result is stored in CY flag. Byte: - Single Flag: - Cy Ex. : - ANL C, P 1. 0 I/P O/P CY = 1 ANL C, P 2. 2 I/P CY = 1 CY = 0 P 1. 0 = 0 O/P CY = 1 P 1. 0 = 1

ANL C, /Source bit Function: - Logical AND for bit variable Description: - Cy flag bit is ANDed with the complement of source bit and result is stored in CY flag. Byte: - Single Ex. : - ANL C, /P 1. 0 Flag: - Cy I/P CY = 1 P 1. 0 = 0 O/P CY = 1

ORL C, Source bit Function: - Logical OR for bit variable Description: - Cy flag bit is ORed with a source bit and result is stored in CY flag. Byte: - Single Flag: - Cy Ex. : - ORL C, P 1. 0 I/P O/P CY = 1 ANL C, P 2. 2 I/P CY = 0 CY = 1 P 1. 0 = 0 O/P CY = 1 P 1. 0 = 1

ORL C, /Source bit Function: - Logical OR for bit variable Description: - Cy flag bit is ORed with the complement of source bit and result is stored in CY flag. Byte: - Single Ex. : - ORL C, /P 1. 0 Flag: - Cy I/P CY = 0 P 1. 0 = 0 O/P CY = 1

MOV dest-bit, source-bit Function: - Move bit data Description: - Copies source bit in destination bit ( One of the operands must be the CY flag. ) Byte: - Single Ex. : - MOV P 2. 5, CY Flag: - No flags I/P O/P CY = 1 P 2. 5 = ?

JB bit, target (JNB bit, target) Function: - Jump if bit set (jump if bit not set) Description: - Used to monitor a given bit and jump to a target address if a given bit is high or low. ( Bit can be any of the bit addressable bit of RAM, Ports or Registers of the 8051. ) Ex. : - JB ACC. 0, NEXT INC A NEXT: MOV R 0, A SETB P 1. 4 HERE: JNB P 1. 4, HERE MOV P 2, #20 h

JC target Function: - Jump if carry (CY = 1) Description: - This instruction examines the CY flag; if it is high, it will jump to the target address. Flag: - None Ex. : - MOV A, #80 h ADD A, #0 F 2 h JC NEXT MOV R 0, A NEXT: END

JNC target Function: - Jump if no carry (CY = 1) Description: - This instruction examines the CY flag; if it is zero, it will jump to the target address. Flag: - None Ex. : - MOV A, #80 h ADD A, #0 F 2 h JNC NEXT MOV R 0, A NEXT: END

Branching Instruction

JZ target Function: - Jump if accumulator is zero (A = 0) Description: - jumps to target add. When accumulator has value zero. Flag: - None JNZ target (Jump if accumulator is not zero. )

DJNZ byte, target Function: - Decrement and jump if not zero Description: - In this instruction a byte is decrement by 1, and if result is not zero it will jump to the target address. Flag: - None BYTE: - Two (1)DJNZ Rn , target (2) DJNZ Direct, target

Ex. : - Count 1 to 5 and send the count to P 1. CLR A MOV R 2, #05 h BACK: INC A MOV P 1, A DJNZ R 2, BACK

CJNE dest-byte, source-byte, target Function: - Compare and jump if not equal Description: - The magnitude of the source byte and dest. byte are compared. If they are not equal, it jumps to the target address. Flag: - CY BYTE: - Two

(1)CJNE A, # data, target (CJNE A, #25 h, NEXT) (2)CJNE A, direct, target (CJNE A, 35 h, BACK) (3)CJNE Rn, #data, target (CJNE R 2, #15 h, NEXT) (4)CJNE @Ri, #data, target (CJNE @R 1, #10 h, L 1)

LJMP 16 bit address (long jump) Function: - Transfers control unconditionally to a new address Description: - Used to jump to any address location with in 64 Kb code space of 8051 Flag: - None BYTE: - Three (1 st byte = opcode 2 nd byte = LSB of add. 3 rd byte = MSB of add. )

SJMP 8 bit address (Short jump) Function: - Transfers control unconditionally to a new address Description: - Used to jump the target address must be within -128 to +127 bytes of PC of the instruction after SJMP. (This add. is also called relative address. ) Flag: - None BYTE: - Two (1 st byte = opcode 2 nd byte = 8 -bit signed number which is added with PC to get target address)

AJMP target address Function: - Absolute jump Description: - Transfers program execution to target add. Unconditionally. Ø Target add. must be within 2 Kb of program memory) Flag: - None

LCALL 16 bit address (long call) Function: - Transfers control to a subroutine Description: - If calling a subroutine, the PC reg. is pushed onto the stack and SP is increment by 2. Ø Then PC is loaded with the new address and control is transferred to subroutine. Ø The target address is within 64 Kb of ROM. Byte: - Three Flag: - None

Subroutine Main Program Memory address Mnemonics 2050 ORG 0000 h 2051 MOV A, #02 h 2052 MOV P 1, A LCALL delay 2053 ADD A, #02 h PC = 2006 ADD A, #02 h 2054 RET 2008 END Memory address Mnemonics 2000 ORG 0000 h 2001 MOV A, #02 h 2003

Main Program Subroutine PC = 0000 h PC = 2050 h SP =09 h 09 20(PCH) 08 06 (PCL) LCALL delay RET 09 00 08 00 SP = 07 h PC = 2006

ACALL 11 bit address (Absolute call) Function: - Transfers control to a subroutine Description: - If calling a subroutine, the PC reg. is pushed onto the stack and SP is increment by 2. Ø Then PC is loaded with the new address and control is transferred to subroutine. Ø The target address is within 2 Kb of current PC. Byte: - Two (5 -bit for Opcode & 11 -bit for address) Flag: - None

RET Function: - Return from subroutine Description: - used to return from a subroutine previously entered by instruction LCALL / ACALL. Ø The top byte of stack are popped into PC and program execution continues at this new add. Ø After popping, stack is decrement by 2. Flag: - None