Diagnostic Test Pattern Generation and Fault Simulation for

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Diagnostic Test Pattern Generation and Fault Simulation for Stuck-at and Transition Faults Committee: Vishwani

Diagnostic Test Pattern Generation and Fault Simulation for Stuck-at and Transition Faults Committee: Vishwani D. Agrawal Adit Singh University Reader: Sanjeev Baskiyar, CSSE Victor P. Nelson Bogdan M. Wilamowski Student: Yu Zhang Auburn University, Auburn, Alabama 36849 USA Mar. 21, 2012 Zhang: Ph. D Defense 1

Purpose • Identification of fault is useful in the characterization phase of design. •

Purpose • Identification of fault is useful in the characterization phase of design. • Present ATPG tools emphasize only fault detection. • There is an accepted measure for fault detection coverage but none for diagnostic coverage. • Diagnosis must deal with non-classical faults, not just single stuck-at faults. Mar. 21, 2012 Zhang: Ph. D Defense 2

Outline • Purpose (motivation) • Introduction & Background • Diagnostic ATPG System – Diagnostic

Outline • Purpose (motivation) • Introduction & Background • Diagnostic ATPG System – Diagnostic Fault Simulation – Exclusive Test Generation – Equivalence Identification • Exclusive test for transition fault • Experimental results • Conclusion Mar. 21, 2012 Zhang: Ph. D Defense 3

Diagnostic ATPG Problem • Given a circuit and a fault model, find: – Test

Diagnostic ATPG Problem • Given a circuit and a fault model, find: – Test vectors to distinguish between all, or most, fault-pairs. – Measure diagnostic coverage of vectors. • Present contributions: – A new diagnostic coverage metric. – A diagnostic ATPG system using new algorithms and conventional stuck-at fault detection tools. – A diagnostic ATPG system for transition faults using new algorithms and available fault-detection tools Mar. 21, 2012 Zhang: Ph. D Defense 4

Introduction Basic testing flow. Mar. 21, 2012 Zhang: Ph. D Defense 5

Introduction Basic testing flow. Mar. 21, 2012 Zhang: Ph. D Defense 5

Fault Detection and Diagnosis 1 Fault D 0 CUT Fault D 1 • Fault

Fault Detection and Diagnosis 1 Fault D 0 CUT Fault D 1 • Fault detection: Need at least one vector that detects a target fault. • Fault diagnosis: Need at least one vector that produced different responses for every pair of faults. Mar. 21, 2012 Zhang: Ph. D Defense 6

Introduction* Fault detection test generation: Find an input vector such that faulty response differs

Introduction* Fault detection test generation: Find an input vector such that faulty response differs from fault-free response. C 0 C 1 = 1 * Yu Zhang, V. D. Agrawal, “A Diagnostic Test Generation System, ” in Proc. International Test Conf. , Nov 2010. Mar. 21, 2012 Zhang: Ph. D Defense 7

Introduction Exclusive test: A test that detects only one Simplified: fault from a fault-pair.

Introduction Exclusive test: A test that detects only one Simplified: fault from a fault-pair. (C 0 C 1 ) (C 0 C 2 ) = 1 ⇒ C 1 C 2 = 1 sa 0 Mar. 21, 2012 Zhang: Ph. D Defense 8

Diagnostic Test Generation System Conventional ATPG 1. Structurally collapsed fault set 2. ATPG system

Diagnostic Test Generation System Conventional ATPG 1. Structurally collapsed fault set 2. ATPG system for detection fault coverage Functionally equivalent fault-pair No Undiagnosed fault-pair Adequate diagnostic coverage? Yes Mar. 21, 2012 4. Exclusive test generator Detection vectors Exclusive vectors Test vectors 3. Diagnostic fault simulator Stop Diagnostic ATPG Zhang: Ph. D Defense 9

Diagnostic Fault Simulator* • Given a set of vectors and a set of faults,

Diagnostic Fault Simulator* • Given a set of vectors and a set of faults, find: – Diagnostic coverage – Identify undiagnosed fault groups with two or more faults – Eliminate the need to target all n(n – 1)/2 fault pairs * Y. Zhang and V. D. Agrawal, “An Algorithm for Diagnostic Fault Simulation, ” Proc. 11 th IEEE Latin-American Workshop, March 2010. Mar. 21, 2012 Zhang: Ph. D Defense 10

Diagnostic Fault Simulation 1. For an input test vector find detected faults. 2. Group

Diagnostic Fault Simulation 1. For an input test vector find detected faults. 2. Group faults with same syndrome (detection pattern at primary outputs). 3. Calculate/update diagnostic coverage (DC). 4. Continue steps 1 through 3 with next test vector until no vectors left. Mar. 21, 2012 Zhang: Ph. D Defense 11

Diagnostic Fault Simulation Original fault set Simulate t 1 G 0 Simulate t 2

Diagnostic Fault Simulation Original fault set Simulate t 1 G 0 Simulate t 2 G 0 fa G 4 G 3 G 2 G 5 fb G 7 Simulate t 3 Simulate tn Mar. 21, 2012 fc fd fe Zhang: Ph. D Defense G 5 12

Diagnostic Fault Coverage (DC)* • Diagnostic coverage (new) • Fault coverage (conventional), Where g

Diagnostic Fault Coverage (DC)* • Diagnostic coverage (new) • Fault coverage (conventional), Where g 0 is the set of undetected faults. * Yu Zhang, V. D. Agrawal, “A Diagnostic Test Generation System and a Coverage Metric, ” 15 th IEEE European Test Symp. , May 2010. Mar. 21, 2012 Zhang: Ph. D Defense 13

Coverage as fraction Diagnostic Coverage 1. 1 1 0. 9 0. 8 0. 7

Coverage as fraction Diagnostic Coverage 1. 1 1 0. 9 0. 8 0. 7 0. 6 0. 5 0. 4 0. 3 0. 2 0. 1 0 1000 900 800 700 600 500 400 300 DC 200 Distin. FP/Total FP 100 No. of Un. FP 1 11 21 31 41 0 51 61 Number of Undistinguished Fault Pairs DC vs. Fault-Pair Coverage – C 432 Number of ATPG Vectors Mar. 21, 2012 Zhang: Ph. D Defense 14

Diagnostic Fault Simulation Take ISCAS 85 benchmark circuit c 17 as an example: 1

Diagnostic Fault Simulation Take ISCAS 85 benchmark circuit c 17 as an example: 1 10 3 20 2 6 7 Mar. 21, 2012 5 11 14 15 Zhang: Ph. D Defense 22 16 21 19 23 15

Diagnostic Fault Simulation • 22 collapsed fault in c 17 (f 1~f 22): f

Diagnostic Fault Simulation • 22 collapsed fault in c 17 (f 1~f 22): f 1: 22 sa 1 f 2: 10 sa 1 f 3: 22 sa 0 f 4: 16 ->22 sa 1 f 5: 3 ->10 sa 1 f 6: 1 sa 1 f 7: 3 sa 0 f 8: 3 sa 1 f 9: 16 sa 1 f 10: 16 sa 0 f 11: 11 ->16 sa 1 Mar. 21, 2012 f 12: f 13: f 14: f 15: f 16: f 17: f 18: f 19: f 20: f 21: f 22: Zhang: Ph. D Defense 2 sa 1 11 sa 0 3 ->11 sa 1 6 sa 1 23 sa 1 19 sa 1 23 sa 0 16 ->23 sa 1 11 ->19 sa 1 7 sa 1 16

Diagnostic Fault Simulation Test vector set for c 17 (generated by our diagnostic ATPG

Diagnostic Fault Simulation Test vector set for c 17 (generated by our diagnostic ATPG system): t 1: t 2: t 3: t 4: t 5: t 6: t 7: t 8: 00000 10110 11101 01110 100111 11000 01010 Mar. 21, 2012 00 10 11 00 01 00 11 11 1 10 3 2 6 22 20 14 5 11 7 Zhang: Ph. D Defense 15 16 21 19 23 17

Diagnostic Fault Simulation Fault simulation without fault dropping: test 1: 00000 00 f 1:

Diagnostic Fault Simulation Fault simulation without fault dropping: test 1: 00000 00 f 1: * 10 f 2: 00 Fault free f 3: 00 response f 4: 00 for test 1 f 5: 00 f 6: 00 * indicates detected f 7: 00 faults f 8: 00 f 9: 00 f 10: * 11 f 11: 00 Mar. 21, 2012 Zhang: Ph. D Defense f 12: f 13: f 14: f 15: f 16: f 17: f 18: f 19: f 20: f 21: f 22: * 11 00 00 * 01 18

Diagnostic Fault Simulation Faults can be grouped according to syndromes (syndromes of t 1):

Diagnostic Fault Simulation Faults can be grouped according to syndromes (syndromes of t 1): Groups Faults Syndrome t 1 G 1 f 1 10 G 2 f 10, f 12 11 G 3 f 17, f 22 01 G 0 All other faults 00 In syndrome, ‘ 1’ represents a mismatch with fault free response. ‘ 0’ means match. f 1 will be dropped from further simulation. Mar. 21, 2012 Zhang: Ph. D Defense 19

Diagnostic Fault Simulation Mar. 21, 2012 Groups Faults Syndrome t 1 G 1 f

Diagnostic Fault Simulation Mar. 21, 2012 Groups Faults Syndrome t 1 G 1 f 1 10 G 2 f 10, f 12 11 G 3 f 17, f 22 01 G 0 All other faults 00 Zhang: Ph. D Defense 20

Diagnostic Fault Simulation Fault simulation with t 2: test 2: 10110 G 2: f

Diagnostic Fault Simulation Fault simulation with t 2: test 2: 10110 G 2: f 10: * 11 f 12: 10 G 3: f 17: * 11 f 22: 10 Mar. 21, 2012 G 0: f 2: * 00 f 3: * 00 f 4: 10 f 5: 10 10 f 6: 10 f 7: * 00 Fault free f 8: 10 response f 9: 10 f 11: 10 f 13: 10 G 0 contains undetected faults. f 14: 10 f 15: 10 After test 2 f 2, f 3, f 16: 10 and f 7 will leave f 18: 10 G 0. f 19: 10 f 20: 10 f 21: 10 Zhang: Ph. D Defense 21

Diagnostic Fault Simulation After applying t 2: Groups G 2 G 4 G 3

Diagnostic Fault Simulation After applying t 2: Groups G 2 G 4 G 3 G 5 G 0 G 6 Faults Syndrome t 2 f 10 01 f 12 00 f 17 01 f 22 00 All other faults 00 f 2, f 3, f 7 10 f 10, f 12, f 17, f 22 are dropped from further simulation Mar. 21, 2012 Zhang: Ph. D Defense 22

Diagnostic Fault Simulation Groups G 2 G 4 G 3 G 5 G 0

Diagnostic Fault Simulation Groups G 2 G 4 G 3 G 5 G 0 G 6 Mar. 21, 2012 Faults Syndrome t 2 f 10 01 f 12 00 f 17 01 f 22 00 All other faults 00 f 2, f 3, f 7 10 Zhang: Ph. D Defense 23

Dictionary Construction This is a fault dictionary constructed after applying t 2. It can

Dictionary Construction This is a fault dictionary constructed after applying t 2. It can be used for cause-effect diagnosis ‘X’ means don’t care or unknown Faults Syndrome t 1 Syndrome t 3 ~ t 8 f 1 10 X … f 10 11 01 … f 12 11 00 … f 17 01 01 … f 22 01 00 … f 2, f 3, f 7 00 10 … All other faults 00 00 … Mar. 21, 2012 Zhang: Ph. D Defense 24

Diagnostic Fault Simulation Continue to apply test vectors to all groups, and divide faults

Diagnostic Fault Simulation Continue to apply test vectors to all groups, and divide faults into sub groups. After t 1: f 1 is dropped G 1: f 1 (10) G 2: f 10, f 12 (11) G 0: f 1, f 2, f 3, …f 22 (no test applied) G 0: G 3: All other f 17, f 22 (01) faults (00) Mar. 21, 2012 Zhang: Ph. D Defense 25

Diagnostic Fault Simulation After t 2: G 2: f 10, f 12 G 2:

Diagnostic Fault Simulation After t 2: G 2: f 10, f 12 G 2: f 10 (01) G 5: f 12 (00) Single fault groups are dropped. Mar. 21, 2012 Zhang: Ph. D Defense 26

Diagnostic Fault Simulation Similarly for G 3: f 17, f 22 G 3: f

Diagnostic Fault Simulation Similarly for G 3: f 17, f 22 G 3: f 17 (01) G 6: f 22 (00) Single fault groups are dropped. Mar. 21, 2012 Zhang: Ph. D Defense 27

Diagnostic Fault Simulation For G 0: f 2~f 9, f 11, f 13~f 16,

Diagnostic Fault Simulation For G 0: f 2~f 9, f 11, f 13~f 16, f 18~f 21 G 7: f 2, f 3, f 7 (10) Mar. 21, 2012 No faults are dropped here. G 0: all other undetected faults (00) Zhang: Ph. D Defense 28

Diagnostic Fault Simulation • For c 17 after applying all 8 test vectors, we

Diagnostic Fault Simulation • For c 17 after applying all 8 test vectors, we get 22 fault groups with only one fault in each group. Mar. 21, 2012 Zhang: Ph. D Defense 29

Fault Dropping • Each group contains faults that are not distinguished from others within

Fault Dropping • Each group contains faults that are not distinguished from others within that group, but are distinguished from those in other groups. • During simulation once a fault is placed alone in a single-fault group, it is dropped from further simulation. Mar. 21, 2012 Zhang: Ph. D Defense 30

Diagnostic Fault Simulation Summarize: Original fault set Simulate t 1 G 0 Simulate t

Diagnostic Fault Simulation Summarize: Original fault set Simulate t 1 G 0 Simulate t 2 G 0 fa G 4 G 3 G 2 G 5 fb G 7 Simulate t 3 Simulate tn Mar. 21, 2012 fc fd fe Zhang: Ph. D Defense G 5 31

Summary for Fault Simulation • Diagnostic coverage metric defined. • Diagnostic fault simulation has

Summary for Fault Simulation • Diagnostic coverage metric defined. • Diagnostic fault simulation has similar complexity as conventional simulation with fault dropping. Mar. 21, 2012 Zhang: Ph. D Defense 32

Exclusive Test* Generation • An exclusive test for fault-pair (f 1, f 2) distinguishes

Exclusive Test* Generation • An exclusive test for fault-pair (f 1, f 2) distinguishes between the two faults. • If no exclusive test exists, then the two faults cannot be distinguished from each other and form an equivalent fault-pair. * V. D. Agrawal, D. H. Baik, Y. C. Kim, and K. K. Saluja, “Exclusive Test and its Applications to Fault Diagnosis, ” Proc. 16 th International Conf. VLSI Design, Jan. 2003, pp. 143– 148. Mar. 21, 2012 Zhang: Ph. D Defense 33

Exclusive Test Generation Need two copies of circuit New model: Previous C 1 C

Exclusive Test Generation Need two copies of circuit New model: Previous C 1 C 2 = 1 X G(X, y) Sa 0 or Sa 1 Mar. 21, 2012 Zhang: Ph. D Defense 34

Exclusive Test Generation Single circuit copy ATPG: find a test vector to distinguish fault

Exclusive Test Generation Single circuit copy ATPG: find a test vector to distinguish fault f 1 (line x 1 s-a-a) from fault f 2 (line x 2 s-a-b) PO PI line x 1 line x 2 Mar. 21, 2012 s-a-a s-a-b Zhang: Ph. D Defense 35

New Diagnostic ATPG Model • Two-copy ATPG model with C 1 and C 2:

New Diagnostic ATPG Model • Two-copy ATPG model with C 1 and C 2: • Substitue: • Single-copy ATPG model with C: Mar. 21, 2012 Zhang: Ph. D Defense 36

Single Copy Exclusive Test Generation Consider exclusive test for x 1 s-a-a and x

Single Copy Exclusive Test Generation Consider exclusive test for x 1 s-a-a and x 2 s-a-b y PO x 1 PI x 1’ a x 2 CUT C Mar. 21, 2012 G x 2’ b Zhang: Ph. D Defense 37

A Simplified Model Suppose a is 0 and b is 1, the model can

A Simplified Model Suppose a is 0 and b is 1, the model can be simplified: y x 1’ PO PI x 2’ CUT C Mar. 21, 2012 Zhang: Ph. D Defense 38

Exclusive Test Generation Example ISCAS 85 c 17 benchmark circuit: 1 10 3 sa

Exclusive Test Generation Example ISCAS 85 c 17 benchmark circuit: 1 10 3 sa 0 20 2 6 5 15 7 sa 1 t 1: 00000 00 t 2: 10110 10 Mar. 21, 2012 11 14 22 16 21 19 23 Seven test vectors generated by ATPG; 100% fault coverage but some fault-pairs not distinguished Zhang: Ph. D Defense 39

Exclusive Test Generation y 1 0 0 1 1 6 0 10 3 20

Exclusive Test Generation y 1 0 0 1 1 6 0 10 3 20 2 11 22 16 14 21 15 19 23 7 Sa 0 or Sa 1 Mar. 21, 2012 1/0 t 8: 10010 00 Zhang: Ph. D Defense 40 0/1

Advantages of Exclusive Test Algorithm • Reduced complexity: Single-copy ATPG model is no more

Advantages of Exclusive Test Algorithm • Reduced complexity: Single-copy ATPG model is no more complex than a single fault ATPG. • No need for especially designed diagnostic ATPG tools that try to propagate different logic values of two faults to POs. • Can take advantage of various existing fault detection ATPG algorithms. Mar. 21, 2012 Zhang: Ph. D Defense 41

Experimental Results Detection test Generation Circuit No. of faults c 17 Diagnostic test Generation

Experimental Results Detection test Generation Circuit No. of faults c 17 Diagnostic test Generation Det. Vect. FC % CPU s* DC % Excl. Abort Equv. Vect. pairs DC % CPU s* 22 7 100. 03 95. 5 1 0 0 100. 03 c 432 524 51 99. 2 0. 03 92. 0 18 13 13 100. 03 c 499 758 53 100. 03 97. 4 0 12 12 100. 03 c 880 942 60 100. 05 92. 6 10 55 55 100. 05 c 1355 1574 85 100. 05 58. 9 2 740 100. 0 0. 13 c 1908 1879 114 99. 9 0. 05 84. 7 20 300 277 98. 8 0. 07 c 2670 2747 107 98. 8 0. 11 79. 1 43 494 466 98. 9 0. 34 c 3540 3428 145 100. 0 0. 13 85. 2 29 541 486 97. 2 0. 42 c 6288 7744 29 99. 6 0. 22 85. 3 108 842 977 99. 5 7. 60 c 7552 7550 209 98. 3 0. 39 86. 0 87 904 1091 99. 4 2. 18 * Core 2 Duo 2. 66 GHz 3 GB RAM Mar. 21, 2012 Zhang: Ph. D Defense 42

Need for Equivalence Identification • Some fault-pairs are functionally equivalent; not found in structural

Need for Equivalence Identification • Some fault-pairs are functionally equivalent; not found in structural collapsing. • Exclusive test ATPG may leave many undiagnosed fault pairs as aborted faults. • Many techniques have been proposed for fault equivalence identification: – Structural analysis – Exhaustive enumeration – Learning & implication – Branch & bound – Circuit transformation & symmetry identification Mar. 21, 2012 Zhang: Ph. D Defense 43

Equivalence Identification* sa 1 Extract a small logic block Faults are functionally equivalent if,

Equivalence Identification* sa 1 Extract a small logic block Faults are functionally equivalent if, exclusive test impossible, or faulty circuits identical. Dominator gate for both faults sa 0 * M. E. Amyeen, W. K. Fuchs, I. Pomeranz, and V. Boppana, “Fault Equivalence Identification in Combinational Circuits Using Implication and Evaluation Techniques, ” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 7, Jul. 2003. Mar. 21, 2012 Zhang: Ph. D Defense 44

Summary of Test Generation • New diagnostic test generation algorithm uses conventional tools: –

Summary of Test Generation • New diagnostic test generation algorithm uses conventional tools: – Diagnostic fault simulation drops diagnosed faults; similar complexity to conventional fault simulators. – Exclusive test generation requires only single fault detection. – Fault equivalence checking is important for DC; requires effective algorithm. Mar. 21, 2012 Zhang: Ph. D Defense 45

Exclusive Test Gen. For Tran. Faults • Introduction and background • Representing a transition

Exclusive Test Gen. For Tran. Faults • Introduction and background • Representing a transition fault as a single stuck-at fault • Exclusive test patterns for transition faults – One and two time frame models • Experimental Results • Summary Mar. 21, 2012 Zhang: Ph. D Defense 46

Purpose • Many modern design failures behave as non-classical faults. • Most failures are

Purpose • Many modern design failures behave as non-classical faults. • Most failures are timing related. • Transition fault model is widely used due to its simplicity. • There exist a need for diagnosis using the transition fault model. Mar. 21, 2012 Zhang: Ph. D Defense 47

Problem Statement and Contribution • Modeling and test generation for transition faults: – Detection

Problem Statement and Contribution • Modeling and test generation for transition faults: – Detection of single transition faults – Exclusive tests for fault-pairs • Contribution: – A diagnostic ATPG system for transition faults using conventional fault-detection tools. Mar. 21, 2012 Zhang: Ph. D Defense 48

Examples of Transition Fault * Mar. 21, 2012 Zhang: Ph. D Defense 49

Examples of Transition Fault * Mar. 21, 2012 Zhang: Ph. D Defense 49

Transition Fault Test with Scan Combinational Logic Scan out SFF Scan enable SFF Scan

Transition Fault Test with Scan Combinational Logic Scan out SFF Scan enable SFF Scan in Mar. 21, 2012 Zhang: Ph. D Defense 50

Two Time-Frame Model • There are 2 possible ways to model a transition fault

Two Time-Frame Model • There are 2 possible ways to model a transition fault with a single stuck-at fault: – First, since most digital designs are sequential, we can use a 2 -time-frame circuit. PI PO line x 1 1 st time frame Mar. 21, 2012 2 nd time frame Zhang: Ph. D Defense 51

Detection Test Generation Detection test for xx’ slow-to-rise Useful for equivalence identification Two-time-frame Model

Detection Test Generation Detection test for xx’ slow-to-rise Useful for equivalence identification Two-time-frame Model (Simplified): PI PO x x x’ x’ y Mar. 21, 2012 s-a-1 Zhang: Ph. D Defense 52

Representation of a Transition Fault 1 0 Clock Slow to rise x x’ MFF

Representation of a Transition Fault 1 0 Clock Slow to rise x x’ MFF Model: x x’ MFF init. 1 Mar. 21, 2012 Zhang: Ph. D Defense x x’ 00 00 01 00 10 10 11 11 53

Detection Test Generation Using MFF Model: PI x 0 1 MFF init. 1 x’

Detection Test Generation Using MFF Model: PI x 0 1 MFF init. 1 x’ PO s-a-1 y Test for y sa 1 is also a test for xx’ slow to rise Mar. 21, 2012 Zhang: Ph. D Defense 54

Detection Test Generation PI x x’ PO MFF init. 1 s-a-1 y Test for

Detection Test Generation PI x x’ PO MFF init. 1 s-a-1 y Test for y sa 1 is also a test for xx’ slow to rise Mar. 21, 2012 Zhang: Ph. D Defense 55

Single Copy Exclusive Test Generation Exclusive test for x 1 x 1’ slow-to-fall and

Single Copy Exclusive Test Generation Exclusive test for x 1 x 1’ slow-to-fall and x 2 x 2’ slow-to-rise: PI x 1 y s-a-0/1 Mar. 21, 2012 x 2 0 1 MFF init. 0 MFF init. 1 Zhang: Ph. D Defense 0 1 PO x 1’ x 2’ 56

Single Copy Exclusive Test Generation Simplified version: PO PI x 1 MFF init. 0

Single Copy Exclusive Test Generation Simplified version: PO PI x 1 MFF init. 0 s-a-0/1 x 2 Mar. 21, 2012 MFF init. 1 Zhang: Ph. D Defense x 1’ x 2’ 57

DC vs. Fault-Pair Coverage – s 27 Coverage as fraction 1. 2 50 45

DC vs. Fault-Pair Coverage – s 27 Coverage as fraction 1. 2 50 45 1 40 35 0. 8 30 0. 6 25 20 0. 4 DC 15 0. 2 Distin. FP/Total FP 10 No. of Un. FP 5 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Number of Undistinguished Fault Pairs Diagnostic Coverage Number of ATPG Vectors Mar. 21, 2012 Zhang: Ph. D Defense 58

Experimental Results Detection test Generation Circuit No. of faults s 27 Diagnostic test Generation

Experimental Results Detection test Generation Circuit No. of faults s 27 Diagnostic test Generation Det. Vect. FC % Un. Flt Grp DC % Excl. Vect. 46 11 100. 0 12 52. 2 18 1 2 97. 8 s 298 482 44 79. 9 62 62. 4 34 39 4 70. 1 s 382 616 51 80. 8 82 64. 1 24 58 4 68. 5 s 1423 2364 102 92. 9 280 79. 3 106 182 5 84. 1 s 5378 6589 205 91. 2 400 82. 0 472 85 7 90. 0 s 9234 10416 377 92. 8 1219 75. 8 597 754 8 82. 1 s 13207 14600 480 89. 1 1707 70. 0 543 1392 11 74. 1 s 15850 17517 306 87. 6 1961 71. 2 486 1565 7 74. 3 s 35932 52988 75 99. 0 3737 88. 3 725 2867 4 90. 2 s 38417 47888 244 98. 4 4090 87. 5 1336 2883 8 91. 0 s 38584 56226 395 95. 7 4042 86. 7 1793 2440 7 90. 3 Mar. 21, 2012 Zhang: Ph. D Defense Un. Flt Large Grp st Grp DC % 59

Experimental Results • Results compared to a recent work* Detection test Generation s 38584

Experimental Results • Results compared to a recent work* Detection test Generation s 38584 No. of faults Previous Diagnostic test Generation Det. Vect. FC % Un. Flt DC % Excl. Un. Flt Vect. DC % 1000 2120 -- 14197 97. 16* 583 12881 97. 42* 174649 This work 56226 395 95. 7 4042 86. 7 1793 2440 14841 90. 3 CPUs * Y. Higami, Y. Kurose, S. Ohno, H. Yamaoka, H. Takahashi, Y. Takamatsu, Y. Shimizu, and T. Aikyo, “Diagnostic Test Generation for Transition Faults Using a Stuck-at ATPG Tool, ” in Proc. International Test Conf. , 2009. Paper 16. 3. Mar. 21, 2012 Zhang: Ph. D Defense 60

Future Work • Implement 2 -time frame model to get higher DC. • Targeting

Future Work • Implement 2 -time frame model to get higher DC. • Targeting mixed/multiple fault models. • Test set compaction using DATPG and diagnostic fault simulation: – E. g. reverse/random order simulation of generated vector set, if no new faults are detected AND no new fault groups are formed, the vector in simulation can be dropped. – Combined with ILP for further compaction. Mar. 21, 2012 Zhang: Ph. D Defense 61

Future Work • Example of exclusive test generation for a stuck-at fault and a

Future Work • Example of exclusive test generation for a stuck-at fault and a bridging fault: a b d e c a 0 1 1 c 1 1 y Mar. 21, 2012 s-a-0 a’ d b e 1 0 e’ c’ Zhang: Ph. D Defense 62

Future Work Fault dictionary for previous example: Test Syndrome Faults 010 011 100 111

Future Work Fault dictionary for previous example: Test Syndrome Faults 010 011 100 111 a sa 0 0 1 0 a sa 1 1 0 0 b sa 1 0 0 c sa 0 0 1 0 0 0 c sa 1 1 0 0 e sa 0 AND bridge (a, c) 0 1 1 0 1 0 Mar. 21, 2012 Zhang: Ph. D Defense 63

Summary • A diagnostic coverage metric is proposed. • A new diagnostic ATPG system

Summary • A diagnostic coverage metric is proposed. • A new diagnostic ATPG system for stuck-at fault is constructed. • Experimental results show their effectiveness. • Extend the DATPG system for transition fault. • Experimental results show improved DC. • Only conventional tools are used. Mar. 21, 2012 Zhang: Ph. D Defense 64

References for Some Figures Used • Acknowledgement: * http: //courses. ece. uiuc. edu/ece 543/docs/

References for Some Figures Used • Acknowledgement: * http: //courses. ece. uiuc. edu/ece 543/docs/ Delay. Fault_6_per_page. pdf (Slide 49) * http: //www. sciencephoto. com/media/347881/ enlarge (Slide 47) * http: //www. ami. ac. uk/courses/topics/0268_wb/ index. html (Slide 47) * http: //materials. usask. ca/images/photos/SEM 6 Level. Cu. Chip. P 98. GIF (Slide 2) Mar. 21, 2012 Zhang: Ph. D Defense 65

Publications • Y. Zhang and V. D. Agrawal, “Reduced complexity test generation algorithms for

Publications • Y. Zhang and V. D. Agrawal, “Reduced complexity test generation algorithms for transition fault diagnosis, ” in International Conference on Computer Design (ICCD), Oct. 2011, pp. 96 -101. • Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System, ” in Proc. International Test Conf. , 2010. Paper 12. 3. • Y. Zhang and V. D. Agrawal, “Diagnostic Test Generation and Fault Simulation Algorithms for Transition Faults” in Proc. 20 th North Atlantic Test Workshop, May, 2011 • Y. Zhang and V. D. Agrawal, “An Algorithm for Diagnostic Fault Simulation, ” in Proc. 11 th IEEE Latin-American Workshop, 2010. • Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System, ” in Proc. 19 th North Atlantic Test Workshop, May, 2010. • Y. Zhang and V. D. Agrawal, “A Diagnostic Test Generation System and a Coverage Metric, ” in 15 th IEEE European Test Symp. , May 2010. • Y. Zhang and V. D. Agrawal, “On Diagnostic Test Generation for Stuck-at Faults, ” in preparation. • Y. Zhang and V. D. Agrawal, “A Diagnostic ATPG System Targeting Multiple/Mixed Fault Models, ” in preparation. Mar. 21, 2012 Zhang: Ph. D Defense 66

Thank you Questions? Mar. 21, 2012 Zhang: Ph. D Defense 67

Thank you Questions? Mar. 21, 2012 Zhang: Ph. D Defense 67