Digital Integrated Circuits A Design Perspective Jan M

Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The Devices July 30, 2002 © Digital Integrated Circuits 2 nd Devices

Goal of this chapter Present intuitive understanding of device operation q Introduction of basic device equations q Introduction of models for manual analysis q Introduction of models for SPICE simulation q Analysis of secondary and deep-submicron effects q Future trends q © Digital Integrated Circuits 2 nd Devices

The Diode B A Al Si. O 2 p n Cross-section of pn-junction in an IC process A p Al A n B One-dimensional representation B diode symbol Mostly occurring as parasitic element in Digital ICs © Digital Integrated Circuits 2 nd Devices

Depletion Region © Digital Integrated Circuits 2 nd Devices

Diode Current © Digital Integrated Circuits 2 nd Devices

Forward Bias Typically avoided in Digital ICs © Digital Integrated Circuits 2 nd Devices

Reverse Bias The Dominant Operation Mode © Digital Integrated Circuits 2 nd Devices

Models for Manual Analysis © Digital Integrated Circuits 2 nd Devices

Junction Capacitance © Digital Integrated Circuits 2 nd Devices

Diffusion Capacitance © Digital Integrated Circuits 2 nd Devices

Secondary Effects ID (A) 0. 1 0 – 0. 1 – 25. 0 – 15. 0 – 5. 0 0 5. 0 VD (V) Avalanche Breakdown © Digital Integrated Circuits 2 nd Devices

Diode Model © Digital Integrated Circuits 2 nd Devices

SPICE Parameters © Digital Integrated Circuits 2 nd Devices

What is a Transistor? A Switch! An MOS Transistor |VGS| © Digital Integrated Circuits 2 nd Devices

The MOS Transistor Polysilicon © Digital Integrated Circuits 2 nd Aluminum Devices

MOS Transistors Types and Symbols D D G G S S NMOS Enhancement NMOS Depletion D G G S PMOS Enhancement © Digital Integrated Circuits 2 nd D B S NMOS with Bulk Contact Devices

Threshold Voltage: Concept © Digital Integrated Circuits 2 nd Devices

The Threshold Voltage © Digital Integrated Circuits 2 nd Devices

The Body Effect © Digital Integrated Circuits 2 nd Devices

Current-Voltage Relations A good ol’ transistor 6 x 10 -4 VGS= 2. 5 V 5 Resistive Saturation 4 ID (A) VGS= 2. 0 V 3 VDS = VGS - VT 2 VGS= 1. 5 V 1 0 Quadratic Relationship VGS= 1. 0 V 0 0. 5 1 1. 5 2 2. 5 VDS (V) © Digital Integrated Circuits 2 nd Devices

Transistor in Linear © Digital Integrated Circuits 2 nd Devices

Transistor in Saturation Pinch-off © Digital Integrated Circuits 2 nd Devices

Current-Voltage Relations Long-Channel Device © Digital Integrated Circuits 2 nd Devices

A model for manual analysis © Digital Integrated Circuits 2 nd Devices

Current-Voltage Relations The Deep-Submicron Era 2. 5 x 10 -4 VGS= 2. 5 V Early Saturation 2 VGS= 2. 0 V ID (A) 1. 5 VGS= 1. 5 V 1 0. 5 0 Linear Relationship VGS= 1. 0 V 0 0. 5 1 1. 5 2 2. 5 VDS (V) © Digital Integrated Circuits 2 nd Devices

u n (m/s) Velocity Saturation usat = 105 Constant velocity Constant mobility (slope = µ) xc = 1. 5 © Digital Integrated Circuits 2 nd x (V/µm) Devices

Perspective ID Long-channel device VGS = VDD Short-channel device V DSAT © Digital Integrated Circuits 2 nd VGS - V T VDS Devices

ID versus VGS -4 6 x 10 -4 x 10 2. 5 5 2 4 linear quadratic ID (A) 1. 5 3 1 2 0. 5 1 quadratic 0 0 0. 5 1 1. 5 VGS(V) Long Channel © Digital Integrated Circuits 2 nd 2 2. 5 0 0 0. 5 1 1. 5 2 2. 5 VGS(V) Short Channel Devices

ID versus VDS -4 6 -4 x 10 VGS= 2. 5 V x 10 2. 5 VGS= 2. 5 V 5 2 Resistive Saturation ID (A) VGS= 2. 0 V 3 VDS = VGS - VT 2 1 VGS= 1. 5 V 0. 5 VGS= 1. 0 V VGS= 1. 5 V 1 0 0 VGS= 2. 0 V 1. 5 ID (A) 4 VGS= 1. 0 V 0. 5 1 VDS(V) 1. 5 Long Channel © Digital Integrated Circuits 2 nd 2 2. 5 0 0 0. 5 1 VDS(V) 1. 5 2 2. 5 Short Channel Devices

A unified model for manual analysis G S D B © Digital Integrated Circuits 2 nd Devices

Simple Model versus SPICE 2. 5 x 10 -4 VDS=VDSAT 2 Velocity Saturated ID (A) 1. 5 Linear 1 VDSAT=VGT 0. 5 VDS=VGT 0 0 0. 5 Saturated 1 1. 5 2 2. 5 VDS (V) © Digital Integrated Circuits 2 nd Devices

A PMOS Transistor -4 0 x 10 VGS = -1. 0 V -0. 2 VGS = -1. 5 V ID (A) -0. 4 -0. 6 -0. 8 -1 -2. 5 VGS = -2. 0 V Assume all variables negative! VGS = -2. 5 V -2 -1. 5 -1 -0. 5 0 VDS (V) © Digital Integrated Circuits 2 nd Devices

Transistor Model for Manual Analysis © Digital Integrated Circuits 2 nd Devices

The Transistor as a Switch © Digital Integrated Circuits 2 nd Devices

The Transistor as a Switch © Digital Integrated Circuits 2 nd Devices

The Transistor as a Switch © Digital Integrated Circuits 2 nd Devices

MOS Capacitances Dynamic Behavior © Digital Integrated Circuits 2 nd Devices

Dynamic Behavior of MOS Transistor © Digital Integrated Circuits 2 nd Devices

The Gate Capacitance Polysilicon gate Source xd n+ xd Ld W Drain n+ Gate-bulk overlap Top view Gate oxide tox n+ L n+ Cross section © Digital Integrated Circuits 2 nd Devices

Gate Capacitance Cut-off Resistive Saturation Most important regions in digital design: saturation and cut-off © Digital Integrated Circuits 2 nd Devices

Gate Capacitance as a function of VGS (with VDS = 0) © Digital Integrated Circuits 2 nd Capacitance as a function of the degree of saturation Devices

Measuring the Gate Cap © Digital Integrated Circuits 2 nd Devices

Diffusion Capacitance Channel-stop implant N A 1 Side wall Source ND W Bottom xj Side wall LS © Digital Integrated Circuits 2 nd Channel Substrate N A Devices

Junction Capacitance © Digital Integrated Circuits 2 nd Devices

Linearizing the Junction Capacitance Replace non-linear capacitance by large-signal equivalent linear capacitance which displaces equal charge over voltage swing of interest © Digital Integrated Circuits 2 nd Devices

Capacitances in 0. 25 mm CMOS process © Digital Integrated Circuits 2 nd Devices

The Sub-Micron MOS Transistor q Threshold Variations q Subthreshold Conduction q Parasitic Resistances © Digital Integrated Circuits 2 nd Devices

Threshold Variations VT VT Long-channel threshold L Threshold as a function of the length (for low VDS ) © Digital Integrated Circuits 2 nd Low VDS threshold VDS Drain-induced barrier lowering (for low L) Devices

Sub-Threshold Conduction -2 The Slope Factor 10 Linear -4 10 -6 10 Quadratic ID (A) S is DVGS for ID 2/ID 1 =10 -8 10 -10 Exponential -12 VT 10 10 0 0. 5 1 1. 5 VGS (V) © Digital Integrated Circuits 2 nd 2 2. 5 Typical values for S: 60. . 100 m. V/decade Devices

Sub-Threshold ID vs VGS VDS from 0 to 0. 5 V © Digital Integrated Circuits 2 nd Devices

Sub-Threshold ID vs VDS VGS from 0 to 0. 3 V © Digital Integrated Circuits 2 nd Devices

Summary of MOSFET Operating Regions q Strong Inversion VGS > VT § Linear (Resistive) VDS < VDSAT § Saturated (Constant Current) VDSAT q Weak Inversion (Sub-Threshold) VGS VT § Exponential in VGS with linear VDS dependence © Digital Integrated Circuits 2 nd Devices

Parasitic Resistances © Digital Integrated Circuits 2 nd Devices

Latch-up © Digital Integrated Circuits 2 nd Devices

Future Perspectives 25 nm FINFET MOS transistor © Digital Integrated Circuits 2 nd Devices