Digital Logic Design Dr Waseem Ikram Lecture 05

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Digital Logic & Design Dr. Waseem Ikram Lecture 05

Digital Logic & Design Dr. Waseem Ikram Lecture 05

Recap n n Octal Number System Alternate Representations n Excess Code n BCD Code

Recap n n Octal Number System Alternate Representations n Excess Code n BCD Code n Gray Code Alphanumeric Code (ASCII) Error Detection using Parity Bit

Logic Gates n n n Basic Building Blocks Logic Gate Symbol Unique function Truth

Logic Gates n n n Basic Building Blocks Logic Gate Symbol Unique function Truth or Function Table Function Expression Timing Diagram

AND Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple

AND Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple inputs

AND Gate function n Logical Multiplication function Input A 0 0 1 1 B

AND Gate function n Logical Multiplication function Input A 0 0 1 1 B 0 1 Output F 0 0 0 1

AND Gate Timing Diagram

AND Gate Timing Diagram

OR Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple

OR Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple inputs

OR Gate function n Boolean Add function Input A 0 0 1 1 B

OR Gate function n Boolean Add function Input A 0 0 1 1 B 0 1 Output F 0 1 1 1

OR Gate Timing Diagram

OR Gate Timing Diagram

NOT Gate n n 1 input 1 output

NOT Gate n n 1 input 1 output

NOT Gate function n Invert function Input Output A F 0 1 1 0

NOT Gate function n Invert function Input Output A F 0 1 1 0

NOT Gate Timing Diagram

NOT Gate Timing Diagram

AND Gate Applications n Enable/Disable Device n Counter counts when it receives pulses

AND Gate Applications n Enable/Disable Device n Counter counts when it receives pulses

OR Gate Applications n Car door open alarm

OR Gate Applications n Car door open alarm

NOT Gate Applications n 1’s Complement

NOT Gate Applications n 1’s Complement

Alternate Representations

Alternate Representations

NAND Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple

NAND Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple inputs

NAND Gate function n NOT-AND function Input A 0 0 1 1 B 0

NAND Gate function n NOT-AND function Input A 0 0 1 1 B 0 1 Output F 1 1 1 0

NAND Gate Timing Diagram

NAND Gate Timing Diagram

NAND Universal Gate Input A 0 0 1 1 B 0 1 Output F

NAND Universal Gate Input A 0 0 1 1 B 0 1 Output F 1 1 1 0

NAND Universal Gate Input A 0 0 1 1 B 0 1 Output F

NAND Universal Gate Input A 0 0 1 1 B 0 1 Output F 1 1 0 Output F 0 0 0 1

NAND Universal Gate Input A 0 0 1 1 B 0 1 Output F

NAND Universal Gate Input A 0 0 1 1 B 0 1 Output F 0 1 1 1

NOR Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple

NOR Gate n n n 1 output 2 inputs 3 inputs 4 inputs Multiple inputs

NOR Gate function n NOT-OR function Input A 0 0 1 1 B 0

NOR Gate function n NOT-OR function Input A 0 0 1 1 B 0 1 Output F 1 0 0 0

NOR Gate Timing Diagram

NOR Gate Timing Diagram