VLSI design Lecture 1 MOS Transistor Theory 3

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VLSI design Lecture 1: MOS Transistor Theory 3: CMOS Transistor Theory 1

VLSI design Lecture 1: MOS Transistor Theory 3: CMOS Transistor Theory 1

Outline q q Introduction MOS Capacitor n. MOS I-V Characteristics p. MOS I-V Characteristics

Outline q q Introduction MOS Capacitor n. MOS I-V Characteristics p. MOS I-V Characteristics 3: CMOS Transistor Theory CMOS VLSI Design 2

Introduction q Treatment of transistors as something beyond ideal switches q An ON transistor

Introduction q Treatment of transistors as something beyond ideal switches q An ON transistor passes a finite amount of current – Depends on terminal voltages – Derive current-voltage (I-V) relationships q Transistor gate, source, drain all have capacitance – I = C (DV/Dt) -> Dt = (C/I) DV – Capacitance and current determine speed 3: CMOS Transistor Theory CMOS VLSI Design 3

MOS Capacitor q Gate and body form MOS capacitor q Operating modes – Accumulation

MOS Capacitor q Gate and body form MOS capacitor q Operating modes – Accumulation – Depletion – Inversion 3: CMOS Transistor Theory CMOS VLSI Design 4

Terminal Voltages q Mode of operation depends on Vg, Vd, Vs – Vgs =

Terminal Voltages q Mode of operation depends on Vg, Vd, Vs – Vgs = Vg – Vs – Vgd = Vg – Vds = Vd – Vs = Vgs - Vgd q Source and drain are symmetric diffusion terminals – By convention, source is terminal at lower voltage – Hence Vds 0 q n. MOS body is grounded. First assume source is 0 too. q Three regions of operation – Cutoff – Linear – Saturation 3: CMOS Transistor Theory CMOS VLSI Design 5

n. MOS Cutoff q No channel q Ids = 0 3: CMOS Transistor Theory

n. MOS Cutoff q No channel q Ids = 0 3: CMOS Transistor Theory CMOS VLSI Design 6

n. MOS Linear q Channel forms q Current flows from d to s –

n. MOS Linear q Channel forms q Current flows from d to s – e- from s to d q Ids increases with Vds q Similar to linear resistor 3: CMOS Transistor Theory CMOS VLSI Design 7

n. MOS Saturation q q Channel pinches off Ids independent of Vds We say

n. MOS Saturation q q Channel pinches off Ids independent of Vds We say current saturates Similar to current source 3: CMOS Transistor Theory CMOS VLSI Design 8

I-V Characteristics q In Linear region, Ids depends on – How much charge is

I-V Characteristics q In Linear region, Ids depends on – How much charge is in the channel? – How fast is the charge moving? 3: CMOS Transistor Theory CMOS VLSI Design 9

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion – Gate – oxide – channel q Qchannel = 3: CMOS Transistor Theory CMOS VLSI Design 10

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion – Gate – oxide – channel q Qchannel = CV q C= 3: CMOS Transistor Theory CMOS VLSI Design 11

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion – Gate – oxide – channel q Qchannel = CV Cox = eox / tox q C = Cg = eox. WL/tox = Cox. WL q V= 3: CMOS Transistor Theory CMOS VLSI Design 12

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion

Channel Charge q MOS structure looks like parallel plate capacitor while operating in inversion – Gate – oxide – channel q Qchannel = CV Cox = eox / tox q C = Cg = eox. WL/tox = Cox. WL q V = Vgc – Vt = (Vgs – Vds/2) – Vt 3: CMOS Transistor Theory CMOS VLSI Design 13

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral E-field between source and drain q v= 3: CMOS Transistor Theory CMOS VLSI Design 14

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral E-field between source and drain q v = m. E m called mobility q E= 3: CMOS Transistor Theory CMOS VLSI Design 15

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral E-field between source and drain q v = m. E m called mobility q E = Vds/L q Time for carrier to cross channel: – t= 3: CMOS Transistor Theory CMOS VLSI Design 16

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral

Carrier velocity q Charge is carried by eq Carrier velocity v proportional to lateral E-field between source and drain q v = m. E m called mobility q E = Vds/L q Time for carrier to cross channel: – t=L/v 3: CMOS Transistor Theory CMOS VLSI Design 17

n. MOS Linear I-V q Now we know – How much charge Qchannel is

n. MOS Linear I-V q Now we know – How much charge Qchannel is in the channel – How much time t each carrier takes to cross 3: CMOS Transistor Theory CMOS VLSI Design 18

n. MOS Linear I-V q Now we know – How much charge Qchannel is

n. MOS Linear I-V q Now we know – How much charge Qchannel is in the channel – How much time t each carrier takes to cross 3: CMOS Transistor Theory CMOS VLSI Design 19

n. MOS Linear I-V q Now we know – How much charge Qchannel is

n. MOS Linear I-V q Now we know – How much charge Qchannel is in the channel – How much time t each carrier takes to cross 3: CMOS Transistor Theory CMOS VLSI Design 20

n. MOS Saturation I-V q If Vgd < Vt, channel pinches off near drain

n. MOS Saturation I-V q If Vgd < Vt, channel pinches off near drain – When Vds > Vdsat = Vgs – Vt q Now drain voltage no longer increases current 3: CMOS Transistor Theory CMOS VLSI Design 21

n. MOS Saturation I-V q If Vgd < Vt, channel pinches off near drain

n. MOS Saturation I-V q If Vgd < Vt, channel pinches off near drain – When Vds > Vdsat = Vgs – Vt q Now drain voltage no longer increases current 3: CMOS Transistor Theory CMOS VLSI Design 22

n. MOS Saturation I-V q If Vgd < Vt, channel pinches off near drain

n. MOS Saturation I-V q If Vgd < Vt, channel pinches off near drain – When Vds > Vdsat = Vgs – Vt q Now drain voltage no longer increases current 3: CMOS Transistor Theory CMOS VLSI Design 23

n. MOS I-V Summary q Shockley 1 st order transistor models 3: CMOS Transistor

n. MOS I-V Summary q Shockley 1 st order transistor models 3: CMOS Transistor Theory CMOS VLSI Design 24

Example q 0. 6 mm process (Example) – From AMI Semiconductor – tox =

Example q 0. 6 mm process (Example) – From AMI Semiconductor – tox = 100 Å – m = 350 cm 2/V*s – Vt = 0. 7 V q Plot Ids vs. Vds – Vgs = 0, 1, 2, 3, 4, 5 – Use W/L = 4/2 l 3: CMOS Transistor Theory CMOS VLSI Design 25

p. MOS I-V q All dopings and voltages are inverted for p. MOS q

p. MOS I-V q All dopings and voltages are inverted for p. MOS q Mobility mp is determined by holes – Typically 2 -3 x lower than that of electrons mn – 120 cm 2/V*s in AMI 0. 6 mm process q Thus p. MOS must be wider to provide same current – In this class, assume mn / mp = 2 3: CMOS Transistor Theory CMOS VLSI Design 26