EE 345 MicroControllers GateLevel Minimization Prof Ahmad AbuElHaija

EE 345 – Micro-Controllers Gate-Level Minimization Prof. Ahmad Abu-El-Haija

Acknowledgement n This presentation is a modified version of lecture notes prepared by Dr. Pradondet Nilagupta, Kasetsart University. The latter is also a modified version based upon presentations by Prof. Maciej Ciesielski and Prof. Tilman Wolf, University of Massachusetts Amherst, and original slides from the publisher. Digital System Design 13 February 2022 2

Minimization of Logic Functions n We have chips with millions of gates ¡ ¡ n Basic logic functions replicated thousands of times ¡ n Saving one gate for a memory cell pays off What is the criterion for “minimization” ¡ n Why care about minimizing a function? What do a few gates matter? Should we minimize • Number of product terms? • Number of logic operations? • Number of variables (literals? ( • Number of wires? • ? … For implementation: minimize number of gates EE 345 - Micro-Controllers 13 February 2022 3

How to Minimize Gate Count? n Example: ¡ n How many gates do we need for implementation? ¡ ¡ n F=A’BC’+AB’C+ABC’= Σ(2, 4, 5, 6( If AND gates have 3 inputs and OR gates have 4 inputs? If all gates are binary (2 inputs? ( Are there any tricks we can use? ¡ Combine minterms: n n n F = BC’+AB’ ¡ n How many gates does F need now? Simplest expression: ¡ n A’BC’+ABC’=BC’ AB’C’+AB’C=AB’ Minimum number of terms and literals per term We need systematic approach to minimize expression ¡ Answer: Karnaugh maps (K-maps( EE 345 - Micro-Controllers 13 February 2022 4

Karnaugh Maps n n Karnaugh maps (K-maps) are graphical representations of boolean functions. One map cell corresponds to a row in the truth table. Also, one map cell corresponds to a minterm or a maxterm in the boolean expression Multiple-cell areas of the map correspond to standard terms. EE 345 - Micro-Controllers 13 February 2022 5

Two-Variable Map x 2 0 x 1 0 0 x 2 1 m 0 2 1 x 1 1 m 1 3 m 2 OR m 3 0 1 0 0 2 m 0 1 1 m 2 3 m 1 m 3 NOTE: ordering of variables is IMPORTANT for f(x 1, x 2), x 1 is the row, x 2 is the column. Cell 0 represents x 1’x 2’; Cell 1 represents x 1’x 2; etc. If a minterm is present in the function, then a 1 is placed in the corresponding cell. EE 345 - Micro-Controllers 13 February 2022 6

Boolean Function in Karnaugh Map n 1 s and 0 s represent function in Karnaugh map ¡ ¡ ¡ 1 represent On-set (F=1), 0 represents Off-set (F=0( Similar to truth table 0 s are typically not shown EE 345 - Micro-Controllers 13 February 2022 7

Two-Variable Map n n Any two adjacent cells in the map differ by ONLY one variable, which appears complemented in one cell and uncomplemented in the other. Example: m 0 (=x 1’x 2’) is adjacent to m 1 (=x 1’x 2) and m 2 (=x 1 x 2’) but NOT m 3 (=x 1 x 2) EE 345 - Micro-Controllers 13 February 2022 8

2 -Variable Map -- Example n n n f(x 1, x 2) = x 1’x 2’+ x 1’x 2 + x 1 x 2’ = m 0 + m 1 + m 2 = x 1’ + x 2’ 1 s placed in K-map for specified minterms m 0, m 1, m 2 Grouping (ORing) of 1 s allows simplification What (simpler) function is represented by each dashed rectangle? ¡ x 1’ = m 0 + m 1 ¡ x 2’ = m 0 + m 2 Note m 0 covered twice EE 345 - Micro-Controllers 13 February 2022 x 1 x 2 0 1 0 0 1 1 1 2 1 1 3 0 9

3 -variable Karnaugh Map n Karnaugh map with 3 variables: ¡ ¡ Two variables on one side, one on the other Note Gray code sequence (single variable change) facilitates grouping of 1 -entries into logic blocks EE 345 - Micro-Controllers 13 February 2022 10

Blocks in Karnaugh Maps n Identifying blocks in Karnaugh maps ¡ Neighboring minterms can be combined: n ¡ x’y’z’ + x’y’z = x’y’(z’+z) = x’y’ Resulting expression uses fewer literals (z no longer present( EE 345 - Micro-Controllers 13 February 2022 11

3 -Variable Map yz 00 x 0 0 01 1 m 0 4 1 3 m 1 5 m 4 11 2 m 3 7 m 5 10 m 2 6 m 7 m 6 -Note: variable ordering is (x, y, z); yz specifies column, x specifies row. -Each cell is adjacent to three other cells (left or right or top or bottom or edge wrap) EE 345 - Micro-Controllers 13 February 2022 12

Example: Blocks in Karnaugh Maps n Example: ¡ ¡ n F(x, y, z) = Σ(2, 3, 4, 5) = x’yz’+x’yz+xy’z’+xy’z Two blocks of size 2: F = x’y + xy’ EE 345 - Micro-Controllers 13 February 2022 13

Example: Blocks in Karnaugh Maps n What is the Karnaugh map for ¡ n F(x, y, z) = Σ(3, 4, 6, 7? ( Block can continue across “borders”, wrap around ¡ ¡ Left to right Top to bottom F = yz + xz’ EE 345 - Micro-Controllers 13 February 2022 14

Blocks in Karnaugh Maps n Can we combine more than two minterms? n Yes: x’y’z’+x’y’z+xy’z’+xy’z = (x’+x)y’(z’+z) = y’ Any block that is “power of 2 size” can be reduced n ¡ n Needs to be filled entirely with 1 s Largest possible block yields simplest expression EE 345 - Micro-Controllers 13 February 2022 15

Overlapping Blocks n Example: F(A, B, C) = Σ(1, 2, 3, 5, 7( n Blocks can overlap ¡ Still find the largest possible power-2 blocks EE 345 - Micro-Controllers 13 February 2022 16

Converting Blocks into Expressions n How to convert blocks into algebraic expressions? n Write down the variables that do not change ¡ Example: F(A, B, C) = C + A’B EE 345 - Micro-Controllers 13 February 2022 17

Simplification n Enter minterms of the Boolean function into the map, then group terms Example: f(a, b, c) = ac’ + abc + bc’ Result: f(a, b, c) = ac’+ b a bc 1 0 1 00 EE 345 - Micro-Controllers 01 1 1 10 1 00 01 1 1 10 11 11 13 February 2022 18

More Examples n f 1(x, y, z) = ∑ m(2, 3, 5, 7) yz X f 1(x, y, z) = x’y + xz 00 0 1 n f 2(x, y, z) = ∑ m (0, 1, 2, 3, 6) 1 11 10 1 1 1 f 2(x, y, z) = x’+yz’ EE 345 - Micro-Controllers 01 13 February 2022 19

More Examples EE 345 - Micro-Controllers 13 February 2022 20

4 -variable Karnaugh Map n n n Karnaugh map can be extended to 4 variables: Top cells are adjacent to bottom cells. Left-edge cells are adjacent to right-edge cells. Note variable ordering (WXYZ). EE 345 - Micro-Controllers 13 February 2022 21

Four-variable Map Simplification n n One square represents a minterm of 4 literals. A rectangle of 2 adjacent squares represents a product term of 3 literals. A rectangle of 4 squares represents a product term of 2 literals. A rectangle of 8 squares represents a product term of 1 literal. A rectangle of 16 squares produces a function that is equal to logic 1. EE 345 - Micro-Controllers 13 February 2022 22

Example n n Simplify the following Boolean function g(A, B, C, D) = ∑m(0, 1, 2, 4, 5, 7, 8, 9, 10, 12, 13). First put the function g( ) into the map, and then group as many 1 s as possible. cd ab 00 01 00 1 1 01 1 1 10 1 1 11 10 00 01 1 1 11 10 1 1 1 g(A, B, C, D) = c’+b’d’+a’bd EE 345 - Micro-Controllers 13 February 2022 23

Example: 4 -variable Karnaugh Map n Example: F(w, x, y, z)= Σ(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14( EE 345 - Micro-Controllers 13 February 2022 24

Example: Simplify Boolean Function n F(A, B, C, D)= A’B’C’+B’CD’+A’BCD’+AB’C’ EE 345 - Micro-Controllers 13 February 2022 25

Choice of Blocks n We can simplify function by using larger blocks ¡ ¡ n Function needs to contain special type of blocks ¡ n Do we really need all blocks? Can we leave some out to further simplify expression? They are called Essential Prime Implicants Need to define new terms ¡ ¡ ¡ Implicant Prime implicant Essential prime implicant EE 345 - Micro-Controllers 13 February 2022 26

Terminology n Implicant ¡ ¡ n Prime implicant ¡ ¡ n Product term that cannot be further reduced Block of 1’s that cannot be further increased Essential prime implicant ¡ n Any product term in the SOP form A block of 1’s in a K-map Prime implicant that covers a 1 (minterm) that is not covered by any other prime implicant Quine’s Theorem: ¡ ¡ Boolean function can be implemented with only essential prime implicants (but other solutions exist( The number of such implicants is minimum EE 345 - Micro-Controllers 13 February 2022 27

Example n F(A, B, C, D)= Σ(0, 2, 3, 5, 7, 8, 9, 10, 11, 13, 15) n F(A, B, C, D) EE 345 - Micro-Controllers = BD+B’D’+CD+AD = BD+B’D’+CD+AB’ = BD+B’D’+B’C+AD = BD+B’D’+B’C+AB’ 13 February 2022 28

Example n n Consider function f(a, b, c, d) whose K -map is shown at right. a’b’ is not a prime implicant because it is contained in b’. cd ab acd is not a prime implicant 1 because it is contained in ad. 1 b’, ad, and a’cd’ are prime 1 implicants. a’b’ 1 a’cd’ EE 345 - Micro-Controllers 13 February 2022 b’ ad 1 1 1 1 acd 29

Essential Prime Implicants (EPIs) n n n If a minterm of a function F is included in ONLY one prime implicant p, then p is an essential prime implicant of F. An essential prime implicant MUST appear in all possible SOP expressions of a function To find essential prime implicants: ¡ ¡ n Generate all prime implicants of a function Select those prime implicants that contain at least one 1 that is not covered by any other prime implicant. For the previous example, the PIs are b’, ad, and a’cd’; all of these are essential. EE 345 - Micro-Controllers 13 February 2022 ad b’ 1 1 1 a’cd’ 30

Another Example n n Consider f 2(a, b, c, d), whose K-map is shown below. The only essential PI is b’d. ab cd 1 1 1 1 EE 345 - Micro-Controllers 1 13 February 2022 1 31

Examples to illustrate terms A C 0 1 1 1 0 0 1 1 B 6 prime implicants: A'B'D, BC', AC, A'C'D, AB, B'CD D essential minimum cover: AC + BC' + A'B'D A 5 prime implicants: BD, ABC', ACD, A'BC, A'C'D essential C minimum cover: 4 essential implicants EE 345 - Micro-Controllers 13 February 2022 0 0 1 1 1 0 0 D B 32

Systematic Procedure for Simplifying Boolean Functions 1. 2. 3. 4. Generate all PIs of the function. Include all essential PIs. For remaining minterms not included in the essential PIs, select a set of other PIs to cover them, with minimal overlap in the set. The resulting simplified function is the logical OR of the product terms selected above. EE 345 - Micro-Controllers 13 February 2022 33

Example n n n f(a, b, c, d) = ∑m(0, 1, 2, 3, 4, 5, 7, 14, 15). Five grouped terms, not all needed. 3 shaded cells covered by only one term 3 EPIs, since each shaded cell is covered by a different term. F(a, b, c, d) = a’b’ + a’c’ + a’d + abc EE 345 - Micro-Controllers 13 February 2022 cd ab 1 1 1 1 1 34

Product of Sums Simplification n n Use sum-of-products simplification on the zeros of the function in the K-map to get F’. Find the complement of F’, i. e. (F’)’ = F ¡ ¡ Recall that the complement of a boolean function can be obtained by (1) taking the dual and (2) complementing each literal. OR, using De. Morgan’s Theorem. EE 345 - Micro-Controllers 13 February 2022 35

Product of Sums Minimization n How to generate a product of sums from a Karnaugh map? ¡ n Look at 0 s in map instead of 1 s ¡ ¡ ¡ n Use duality of Boolean algebra (De. Morgan law( Generate blocks around 0’s Gives inverse of function Use duality to generate product of sums Example: ¡ ¡ ¡ F = Σ(0, 1, 2, 5, 8, 9, 10( F’ = AB+ CD + BD’ F = (A’+B’)(C’+D’)(B’+D( EE 345 - Micro-Controllers 13 February 2022 36

Gate Implementation EE 345 - Micro-Controllers 13 February 2022 37

Example: POS minimization cd ab 1 1 1 1 0 0 0 1 1 0 0 • F’(a, b, c, d) = ab’ + ac’ + a’bcd’ • Find dual of F’, dual(F’) = (a+b’)(a+c’)(a’+b+c+d’) • Complement of literals in dual(F’) to get F F = (a’+b)(a’+c)(a+b’+c’+d) (verify that this is the same as in slide 33) EE 345 - Micro-Controllers 13 February 2022 38

5 -variable Karnaugh Map DE A=1 BC 6 DE BC EE 345 - Micro-Controllers 1 2 7 1 2 13 0 3 2 8 7 2 4 15 1 2 2 9 6 2 5 14 9 11 10 0 1 4 5 12 8 A=0 9 3 1 7 13 February 2022 1 2 3 2 8 2 0 6 1 2 3 2 ABCDE’ A’BCDE’ 39

Relationship between #of adjacent squares and # of literals EE 345 - Micro-Controllers 13 February 2022 40

Example: 5 -variable Karnaugh Map n Example: F(A, B, C, D, E) = Σ(0, 2, 4, 6, 9, 13, 21, 23, 25, 29, 31( F = A’B’E’+BD’E+ACE EE 345 - Micro-Controllers 13 February 2022 41

Don't Care Conditions n There may be a combination of input values which ¡ ¡ n n n will never occur if they do occur, the output is of no concern. The function value for such combinations is called a don't care. They are usually denoted with x. Each x may be arbitrarily assigned the value 0 or 1 in an implementation. Don’t cares can be used to further simplify a function EE 345 - Micro-Controllers 13 February 2022 42

Minimization using Don’t Cares n n n Treat don't cares as if they are 1 s to generate PIs. Delete PI's that cover only don't care minterms. Treat the covering of remaining don't care minterms as optional in the selection process (i. e. they may be, but need not be, covered). EE 345 - Micro-Controllers 13 February 2022 43

Minimization example n n F(w, x, y, z) = Σ(1, 3, 7, 11, 15) and d(w, x, y, z) = Σ(0, 2, 5( What are possible solutions? EE 345 - Micro-Controllers 13 February 2022 44

Example n n n cd Simplify the function f(a, b, c, d) whose K-map is shown at the right. f = a’c’d+ab’+cd’+a’b’c or f = a’c’d+ab’+cd’+a’bd’ The middle two terms are EPIs, while the first and last terms are selected to cover the minterms m 1, m 4, and m 5. (There’s a third solution!) EE 345 - Micro-Controllers 13 February 2022 ab 00 01 11 10 00 0 1 01 11 10 1 1 0 1 0 0 x x 1 1 x x 0 1 0 1 1 1 0 0 x x 1 1 x x 45

Another Example n n n Simplify the function g(a, b, c, d) whose K-map is shown at right. g = a’c’+ ab or g = a’c’+bd’ EE 345 - Micro-Controllers 13 February 2022 ab cd x 1 0 0 1 x 0 x 1 x x 1 0 x x 0 46

NAND and NOR Implementations n n Digital circuit are frequently constructed with NAND or NOR gates rather than AND and OR gates. NAND and NOR gates are easier to fabricate with electronic components and are the basic gates used in all IC digital logic families. EE 345 - Micro-Controllers 13 February 2022 47

Logic Operations with NAND gate n NOT, AND, and OR can be implemented with NAND EE 345 - Micro-Controllers 13 February 2022 48

Conversion to NAND Implementation n Minimized expressions are AND-OR combinations ¡ Two illustrations for NAND gates n n n AND-invert Invert-OR Key observation: two “bubbles” eliminate each other Two bubbles equal straight wire How to generate a sum of minterms using NAND? ¡ ¡ Use AND-invert for minterms Use invert-OR for sum EE 345 - Micro-Controllers 13 February 2022 49

Conversion to NAND Implementation n Sum of minterms n Replace AND with AND-invert and OR with invert-OR ¡ n Still same circuit! Replace AND-invert and invert-OR with NAND ¡ F=((AB)’(CD)’ = AB+CD EE 345 - Micro-Controllers 13 February 2022 50

NAND Example n Function F = Σ(1, 2, 3, 4, 5, 7( Minimize and implement with NAND Karnaugh map: n Implementation: n n EE 345 - Micro-Controllers 13 February 2022 51

Multilevel NAND circuits n Multilevel circuits conversion rules: 1. 2. 3. n Convert all AND gates to NAND with AND-invert symbols Convert all OR gates to NAND with invert-OR symbols Check all bubbles in diagram. For every bubble that is not compensated by another bubble, insert inverter Example: EE 345 - Micro-Controllers 13 February 2022 52

Example: Multilevel NAND Circuits n F=(AB’+A’B)(C+D(’ n With NAND gates: EE 345 - Micro-Controllers 13 February 2022 53

Logic Operations with NOR gate n NOR can also replace NOT, AND, OR n Two representations of NOR: ¡ OR-invert and invert-AND EE 345 - Micro-Controllers 13 February 2022 54

Converting to NOR Implementations n Same rules as for NAND implementations Example: F = (A+B)(C+D)E n For multi-level circuits: F=(AB’+A’B)(C+D’) EE 345 - Micro-Controllers 13 February 2022 55

Exclusive-OR Function x exclusive-OR y (x XOR y), written as: = x y’ + x’ y is equal to 1 if only x is 1 or only y is 1, but not both. Possible implementations: EE 345 - Micro-Controllers 13 February 2022 56

Exclusive-OR Function n Exclusive-NOR (equivalence) is equal to 1 if both inputs are 1 or if both are 0. ( )’ = (x y’ + x’ y)’ = x y + x’ y’ Exclusive-OR is cummutative and associative, hence: A B = B A, and (A B) C = A (B C) = A B C = (AB’ + A’B) C’ + (AB +A’B’) C’ = AB’C’ + A’B’C + ABC = Σ(1, 2, 4, 7) Also, it can be shown that: A B C D = Σ(1, 2, 4, 7, 8, 11, 13, 14) Hence XOR is an ODD function Similarly, the exclusive-NOR is an EVEN function EE 345 - Micro-Controllers 13 February 2022 57

Exclusive-OR: Odd & Even Functions EE 345 - Micro-Controllers 13 February 2022 58

Exclusive-OR: Odd & Even Functions EE 345 - Micro-Controllers 13 February 2022 59

Parity Generation and Checking n n n Exclusive-OR functions are very useful for error detection. Parity bit is an extra bit transmitted with message to make number of 1 s even (even parity) or odd (odd parity). Message (including parity) is transmitted and checked at receiver for errors: error is detected if checked parity is different from sent parity. We need “parity generator” at sender, and “parity checker” at receiver. Generator: P = x y z Checker: C = x y z P EE 345 - Micro-Controllers 13 February 2022 60

Parity Generation and Checking EE 345 - Micro-Controllers 13 February 2022 61

Note: Sections 3. 8 and 3. 10 are omitted! EE 345 - Micro-Controllers 13 February 2022 62