Templatebased PDN Synthesis in Floorplan and Placement Using

Template-based PDN Synthesis in Floorplan and Placement Using Classifier and CNN Techniques Vidya A Chhabria 1, Andrew B Kahng 2, Minsoo Kim 2, Uday Mallappa 2, Sachin S Sapatnekar 1, and Bangqi Xu 2 1 University of Minnesota; 2 University of California, San Diego Supported in part by the DARPA IDEA program as a part of the Open. ROAD project ASP-DAC 20 1

Outline • • • Introduction ML-based PDN synthesis and refinement methodology Neural network training Neural network evaluation Conclusion 2

Introduction: Motivation PDN model C 4 bump 3

Introduction: Motivation PDN model C 4 bump 4

Introduction: Template Definition • Template-based PDN synthesis: Templates with different densities – – PDN building blocks Pre-defined, PDK-specific templates Piecewise regular PDN Dense templates good for power integrity but bad for congestion – Must be stitchable 5

Introduction: Template Definition PDN model • Template-based PDN synthesis: C 4 bump – – R 1 R 2 R 3 R 4 PDN building blocks Pre-defined, PDK-specific templates Piecewise regular PDN Dense templates good for power integrity but bad for congestion – Must be stitchable • “Which template goes where? ” 6

Outline • • • Introduction ML-based PDN synthesis and refinement methodology Neural network training Neural network evaluation Conclusion 7

Template Pruning Scheme • Ranked based on equivalent resistance and metal utilization • Sub-optimal templates are discarded Higher utilization Higher equivalent resistance 8

Template Pruning Scheme • Ranked based on equivalent resistance and metal utilization • Sub-optimal templates are discarded Higher utilization Higher equivalent resistance 9

Template Pruning Scheme • Ranked based on equivalent resistance and metal utilization • Sub-optimal templates are discarded Higher utilization Higher equivalent resistance 10

Template Pruning Scheme • Ranked based on equivalent resistance and metal utilization • Sub-optimal templates are discarded Higher utilization Higher equivalent resistance Pruned template set: {0, 9, 12, 21, 19, 22, 25, 23, 26} 11

Current Distribution Representation • ML model considerations: – Current distributions – Congestion estimates 12

Current Distribution Representation • ML model considerations: – Current distributions – Congestion estimates • RISC V core current estimates through two stages of the design cycle Floorplan (FP) stage Placement (PL) stage • Two-staged approach for PDN synthesis and refinement 13

Neural Network Topology Floorplan stage multi-layer perceptron Input layer 2313 nodes 3 hidden layers Output layers 256 64 128 nodes 8 classes 14

Neural Network Topology Floorplan stage multi-layer perceptron Input layer 2313 nodes 3 hidden layers Placement stage convolution neural network Output layers 256 64 128 nodes 8 classes 15

ML-based PDN Synthesis and Refinement Flow Inference flow: Coarse current map Technology constraints Templates (Ti) Floorplan stage Coarse congestion map 16

ML-based PDN Synthesis and Refinement Flow Inference flow: Coarse current map Technology constraints Templates (Ti) Multi layer perceptron (MLP) Floorplan stage Coarse congestion map Synthesized IR- and EM-safe PDN 17

ML-based PDN Synthesis and Refinement Flow Inference flow: Coarse current map Technology constraints Templates (Ti) Multi layer perceptron (MLP) Floorplan stage Coarse congestion map Synthesized IR- and EM-safe PDN Detailed current map Placement stage Detailed congestion map 18

ML-based PDN Synthesis and Refinement Flow Inference flow: Coarse current map Technology constraints Templates (Ti) Multi layer perceptron (MLP) Floorplan stage Coarse congestion map Synthesized IR- and EM-safe PDN Detailed current map Convolution neural network (CNN) Placement stage Detailed congestion map Refined IR- and EM-safe PDN 19

Outline • • • Introduction ML-based PDN synthesis and refinement methodology Neural network training Neural network evaluation Conclusion 20

ML Model Training: “Golden Data” Generation Training flow: Technology constraints Templates (Ti) Floorplan stage Coarse current maps Training data generator Coarse congestion maps Synthesized IR- and EM-safe PDNs PDN 21

ML Model Training: “Golden Data” Generation Training flow: Coarse current maps Coarse congestion maps Technology constraints Templates (Ti) Floorplan stage Simulated annealing, GV=J solution at each step IR drop limit EM constraint Synthesized IR- and EM-safe PDNs PDN IR drop constraint EM constraint Congestion limit 22

ML Model Training: “Golden Data” Generation Training flow: Coarse current maps Coarse congestion maps Technology constraints Templates (Ti) Synthesized PDNs Placement stage Simulated annealing, GV=J solution at each step IR drop limit EM constraint Refined IR- and EM-safe PDN IR drop constraint EM constraint Congestion limit 23

ML Model Training: Training Set • Principal of locality is leveraged: – Neural network is independent of chip size – Speeds up training, reduces dimensions of the neural network input data • 3 x 3 region is enough for training Worst case IR drop = 2. 169 m. V Worst case IR drop = 2. 416 m. V x 10 -3 24

ML Model Training: Training Set Data Point • Principal of locality is leveraged: – Neural network is independent of chip size – Speeds up training, reduces dimensions of the neural network input data • MLP training: – Data point: 3 x 3 region current and congestion, golden template ID <average Input current and congestion> congestion map <golden template ID> Golden template ID map ROI 16 16 Template set: {0, 9, 12, 21, 19, 22, 25, 23, 26} 25

Outline • • • Introduction ML-based PDN synthesis and refinement methodology Neural network training Neural network evaluation Conclusion 26

Results: Confusion Matrix for Test Set 10% of data generated is separated out as the test set Lower equivalent resistance 98. 87% IR- and EM-safety accuracy 27

Results: Confusion Matrix for Test Set 10% of data generated is separated out as the test set Lower equivalent resistance 98. 87% IR- and EM-safety accuracy Lower equivalent resistance 97% IR- and EM-safety accuracy 28

Results: RISC V Core 16 FF Technology MLP-synthesized and CNN-refined PDN after placement Input signal congestion map <predicted template ID> Input current map 29

Results: RISC V Core 16 FF Technology MLP-synthesized and CNN-refined PDN after placement Input signal congestion map Predicted template ID map <predicted template ID> Total congestion improvement (%) 30

Results: RISC V Core 16 FF Technology MLP-synthesized and CNN-refined PDN after placement Input signal congestion map Predicted template ID map <predicted template ID> Total congestion improvement Congestion critical region Congestion improvement (ACE metric) = 2. 39% in congestion critical regions 31

Results: Placement stage Uniformgrid Testcase Rocket core Black Parrot Vanilla core Ariane MLP-synthesized CNN-synthesized Max IRIR drop (m. V) Static IR IR limit Tech. node Max IR IR drop (m. V) 8 m. V 16 FF 5. 67 6. 72 90. 54 91. 72 5. 58 6. 74 12 mv 65 LP 11. 56 11. 75 12 m. V 65 LP Congestion improvement (ACE) metric Avg. # # of of tracks saved 91. 55 1. 47% 2. 39% 1, 188 1, 360 96. 22 96. 39 11. 66 98. 57 11. 89 98. 57 2. 39% 3. 22% 1, 278 2, 148 10. 21 8. 47 93. 66 91. 11 10. 81 95. 84 10. 98 95. 84 1. 91% 3. 02% 768 1, 224 11. 44 11. 58 95. 32 96. 94 11. 73 96. 50 11. 82 96. 50 2. 66% 3. 31% 2, 278 2, 574 32

Conclusion • • No-human-in-loop, correct-by-construction PDN synthesis and refinement using predefined templates Encapsulate the expensive analysis step in the one-time ML model training 33

Conclusion • • No-human-in-loop, correct-by-construction PDN synthesis and refinement using predefined templates Encapsulate the expensive analysis step in the one-time ML model training • Average congestion improvement 2. 98% (ACE metric). 34

Conclusion: Open-sourced on Git. Hub • • • Ope. NPDN: Neural-network for PDN synthesis https: //github. com/The-Open. ROAD-Project/Ope. NPDN Integration into Open. ROAD flow: Placement stage PDN refinement as a PDN stripe “depopulation” flow 35

Backup Slides 36

Results: Floorplan stage Uniform grid MLP-synthesized Max IR drop (m. V) Testcase Static IR limit Tech. node Max IR drop (m. V) Rocket core 8 m. V 16 FF 5. 67 90. 54 5. 58 Black Parrot 12 mv 65 LP 11. 56 96. 22 Vanilla core 12 m. V 65 LP 10. 21 Ariane 12 m. V 65 LP 11. 44 Congestion improvement (ACE) metric Avg. # of tracks saved 91. 55 1. 47% 1, 188 11. 66 98. 57 2. 39% 1, 278 93. 66 10. 81 95. 84 1. 91% 768 95. 32 11. 73 96. 50 2. 66% 2, 278 37

Results: Different Testcases 38

Current Map, Template Map, and IR Map Width (μm) Cadence Innovus verification: IR drop (V) Length (μm) Custom implementation: Width (μm) 39

Results: RISC V Core 16 FF Technology MLP-synthesized PDN at floorplan stage Input current and map <average congestion> Predicted <predicted template ID map template ID> Total congestion improvement <uniform PDN> 40

Machine Learning Training • Hyper parameter tuning • Loss function: Cross entropy loss 41