July 9 2006 doc IEEE 802 15 0760

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Project: IEEE P 802. 15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [Tensor. Com Physical Layer Proposal] Date Submitted: [ 9 July, 2007] Source: [Ismail Lakkis] Company [Tensorcom] Address [10875 Rancho Bernardo Rd #108, San Diego, CA, USA] Voice: [858 -676 -0200], FAX: [858 -676 -0300], E-Mail: [ ilakkis@tensorcom. com] Re: [This submission is in response to the TG 3 C call for Proposals (IEEE P 802. 15 -07 -0586 -02 -003 c)] Abstract: [This document describes the Tensorcom physical layer proposal for IEEE 802. 15 TG 3 C. ] Purpose: [For considereation and discussion by IEEE 802. 15 TG 3 C. ] Notice: This document has been prepared to assist the IEEE P 802. 15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P 802. 15. Submission 1 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Tensor. Com Physical Layer Proposal Dual-Mode Single Carrier / OFDM Ismail Lakkis Tensorcom 10875 Rancho Bernardo Rd, #108 San Diego, CA, 92127 July 09, 2007 Submission 2 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Outline § PHY key features § Channelization § Common Preamble § Unified Frame format § Single Carrier Mode § OFDM Mode § Selected responses to the selection criteria § Summary Submission 3 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c PHY Key Features § Dual-mode SC (Single Carrier) / OFDM for different classes of devices and different applications; § Low-complexity interoperability common mode for interoperability between different devices/networks; § Unified common frame format enabling a single HW supporting SC / OFDM; § Link Adaptation & Unequal Error Protection via low – complexity Structured Turbo LDPC / RS; § Balanced Channelization with multiple XTAL support. Submission 4 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Channelization § § § Desired Features Band Plan Direct conversion PLL Reference Diagram Heterodyne PLL Reference Diagram: Variable IF Heterodyne PLL Reference Diagram: Fixed IF Submission 5 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Channelization Desired Features § Use “free spectrums” of Japan, USA, Korea & EU § Support for 4 channels in the available spectrum § Channel Separation in the order of 2 GHz § Single/Dual integer PLL that generates all necessary frequencies using direct synthesis § Support of multiple PLL architectures (Direct conversion, double conversion) § High Frequency Dividers should be in power of 2 : low-frequency dividers can be programmable § Support of multiple crystals including at least one cell crystal & one high frequency crystal Submission 6 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Channelization Channel Number Low Freq. (GHz) Center Freq. (GHz) High Freq. (GHz) 3 d. B BW (MHz) Roll-Off Factor 1 57. 240 58. 320 59. 400 1728 0. 25 2 59. 400 60. 480 61. 560 1728 0. 25 3 61. 560 62. 640 63. 720 1728 0. 25 4 63. 720 64. 800 65. 880 1728 0. 25 2160 MHz 1728 MHz 240 MHz 2 1 57 § § § 120 MHz 1296 MHz 58 59 60 4 3 61 62 63 64 65 66 f. GHz Support Cell phone XTAL: 15 MHz, 18 MHz, 19. 2 MHz & 24 MHz & Other High frequency XTALs: 22. 5, 27, 30, 33. 75, 36, 45, 54 MHz, … Balanced margins to 57/66 GHz & Good roll-off factor Supports Multiple PLL Architectures even with the Cell phone XTAL Dual PLL: High frequency PLL that generates carrier frequencies Low frequency PLL that generates the ADC/DAC & ASIC frequencies Submission 7 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Direct Conversion PLL Reference Diagram Oscillator XTAL f. X ADC/DAC options: 1728 MHz 2592 MHz 3456 MHz ÷ R 1 Phase Detector LPF ÷P ÷M ÷ R 2 Phase Detector VCO f. M ÷N LPF f. N ÷ Q fc f. Q Example: f. ADC = 3456 MHz VCO ÷ 128 x 3 ÷ 128 ÷ 512 ÷ 64 x 3 fc (GHz) f. X (MHz) f. Q(GHz) f. N (MHz) f. M (MHz) R 1 P Q N M R 2 58. 320 60. 480 62. 640 64. 800 15 15 18 18 22. 5 27 27 3. 645 3. 780 3. 915 4. 050 7. 290 7. 560 7. 830 8. 100 1. 82250 1. 89000 1. 95750 2. 02500 3. 645 3. 780 3. 915 4. 050 1215 1260 1305 1350 2430 2520 2610 2700 607. 50 630. 00 652. 50 675. 00 729 756 783 810 405 420 435 450 486 504 522 540 607. 50 630. 00 652. 50 675. 00 729 756 783 810 1 1 1 1 16 16 8 8 32 32 16 16 3 3 3 5 5 3 3 5 5 1 1 1 1 3× 3 2× 2 × 7 29 2× 3 × 5 3× 3× 3 2× 2× 7 29 2× 3× 5 5 5 1 1 Submission 8 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Heterodyne PLL Reference Diagram: Variable IF XTAL Oscillator f. X ADC/DAC options: 1728 MHz 2592 MHz 3456 MHz ÷ R 1 Phase Detector LPF ×P f. S ÷ 2/4 ÷M ÷ R 2 VCO Phase Detector f. M f. N ÷N LPF VCO ÷ 64 x 9 ÷ 16 x 3 x 3 ÷Q f. RF-Mixer I Q f. IF-Mixer %4 f. IF ~ 6 -7 GHz %2 f. IF ~ 11 -13 GHz P = 1 f. IF ~ 19 -21 GHz Example: f. ADC = 3456 MHz ÷ 128 ÷ 4 x 3 x 3 x 5 fc (GHz) f. X(MHz) fs (GHz) f. IF (GHz) f. N (MHz) f. M(MHz) R 1 P Q N M R 2 58. 320 60. 480 62. 640 64. 800 15 15 18 18 22. 5 27 27 25. 920 26. 880 27. 840 28. 800 23. 328 24. 192 25. 056 25. 920 38. 880 40. 320 41. 760 43. 200 23. 328 24. 192 25. 056 25. 920 6. 480 6. 720 6. 960 7. 200 11. 664 12. 096 12. 528 12. 960 19. 440 20. 160 20. 880 21. 600 11. 664 12. 096 12. 528 12. 960 405 420 435 450 1458 1512 1566 1620 607. 50 630. 00 652. 50 675. 00 729 756 783 810 405 420 435 450 486 504 522 540 607. 50 630. 00 652. 50 675. 00 729 756 783 810 1 1 1 1 2 2 2 2 1 1 2 2 64 64 16 16 64 64 32 32 1 1 3 3 1 1 1 1 3 x 3 x 3 2 x 2 x 7 29 2 x 3 x 5 3× 3× 3 2× 2× 7 29 2× 3× 5 3× 3 2× 2 × 7 29 2× 3 × 5 3× 3× 3 2× 2× 7 29 2× 3× 5 5 5 1 1 Submission 9 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Heterodyne PLL Reference Diagram: Fixed IF Oscillator XTAL ADC/DAC options: 1728 MHz 2592 MHz 3456 MHz f. X ÷ R 1 Phase Detector LPF f. M ÷M ÷ R 2 Phase Detector f. RF VCO f. N ÷N LPF VCO f. Q ÷Q f. IF ÷P f. ADC ÷L ÷ 64 x 3 ÷ 16 x 3 x 3 ÷ 128 ÷ 4 x 3 x 3 x 5 fc (GHz) f. X(MHz) f. RF (GHz) f. IF (GHz) f. Q (MHz) f. N(MHz) f. M(MHz) R 1 P Q N M L R 2 58. 320 60. 480 62. 640 64. 800 15 15 18 18 22. 5 27 27 49. 680 51. 840 54. 000 56. 160 51. 408 53. 568 55. 728 57. 888 8. 640 8. 640 6. 912 6. 912 3105 3240 3375 3510 6426 6696 6966 7236 1552. 50 1620. 00 1687. 50 1755. 00 3213 3348 3483 3618 1035 1080 1125 1170 2142 2232 2322 2412 517. 50 202. 50 562. 50 877. 50 459 837 1161 1809 1035 1080 1125 1170 306 558 774 1206 517. 50 67. 50 112. 50 292. 50 459 837 1161 1809 1 1 1 1 16 16 8 8 32 32 16 16 3 3 3 3 3 8 3 2 7 4 3 2 3 3 7 4 3 2 1 3 5 3 1 1 23 2 x 2 x 2 x 3 5 x 5 2 x 13 17 31 43 67 23 3 5 13 17 31 43 67 5 5 5 5 4 4 4 4 1 1 1 1 Submission 10 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Common Mode § § § § § Common Mode Highlights Preamble Structure & Frame Format Rate, Timing & Frame Related Parameters Transmitter Reference Diagram Spreading Codes & Properties The Modulator & Mapper The Reed Solomon FEC The Scrambler The Frame & Header Check Sequences The Pulse Shaper Submission 11 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Common Mode Highlights § Definition: Common Mode (CM) is a Base Rate (BR) Mode that is mandatory for all devices § Usage: CM is used for beaconing, signaling and for BR data packets § Common mode: necessary for interoperability between different devices & different networks § Modulation: Golay symbols with chip level p/2 -DBPSK § Pulse Shaping: left to the implementer § § § Example 1: GMSK or Linearized GMSK pulse with BT=0. 5 (recommended); Example 2: Square-root raised cosine with roll-off=0. 25 with clipping /lifting; Example 3: Square-root raised cosine with roll-off=0. 25 without clipping § Coding: Shortened Reed-Solomon from RS(255, 239) § Spreading Codes: § § § Submission length 128 codes (a 128 & b 128) used for SYNC & SFD fields length 256 codes (a 256 & b 256) used for CES length 064 codes (a 064 & b 064) used for Header and data 12 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Preamble Structure & Frame Format 64 chips ~ 37 ns Long : Tpreamble = 2. 963 ms Short: Tpreamble = 1. 333 ms ±a 64 ±b 64 PLCP Preamble PLCP Header PSDU SFD Start Frame Delimiter Packet/Frame Sync Sequence (Long Preamble: 30 Codes, Short Preamble: 8 Codes) CES Channel Estimation Sequence 128 a 128 -a 128 a. CP a 256 a. CP b 256 b. CP -a 128 a. N & b. N are a complementary Golay codes pair of length N § § § a 128 Long preamble is the default preamble; PNC switch from long preamble to short preamble upon Device request (implicit or explicit) Header & PSDU are spread using Golay codes a 64 & b 64. Each symbol carries 2 bits of information Submission 13 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c PSDU Rate & Timing Parameters • MSps • Mbps • FEC = Mega Symbols per second = Mega bits per second = RS(240, 224), Rate = 224/240 = 0. 933 Submission 14 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c PSDU Frame Dependent Parameters Submission 15 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Transmitter Reference Block Diagram RATE (5 bits) R 0…R 4 0: 4 Number of (sub) Frame Sub-Frames LENGTH Number (5 bits) (16 bits) (5 bits) S 0: S 4 5: 9 PHY Header 5 octets L 0…L 15 10: 25 F 0: F 31 26: 30 CP mode (2 bits) PCESL mode (2 bits) PCESP mode (1 bit) Reserved C 0: C 1 31: 32 U 0: U 1 33: 34 P 0 35 R 0: R 3 36: 39 (5 bits) Dest. Addr Src. Addr 2 Octets Sequence Control 2 Octets MAC HDR Frame body 10 Octets 0: 65535 Octets PHY_HDR (40 b) MAC Header 10 octets Frame Control 2 Octets CRC 4 Octets Access Information 2 Octets MPDU Pad Bits (Zeros) MAC_HDR (80 b) Append Compute HCS Scramble HCS (16 b) MAC_HDR/HCS (96 b) Scramble RS(255, 239) PHY_HDR (40 b) Append Scrambled HCS (16 b) Scrambled MAC_HDR (80 b) Golay Symbol Mapper Shortened RS(25, 17) PHY Header 5 octets Scrambled MAC Scrambled Header HCS 10 octets 2 octets Scrambled & RS Encoded PLCP Header (200 b) Submission Preamble Insertion p/2 -DBPSK/GMSK Modulator RS(24, 16) Parity Bits 8 octets Optional Pulse Shaper 16 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Spreading Codes: Desired Features § Quasi-perfect code: Low SLL (Side Lobe Level) and wide ZCZ (Zero Correlation Zone) for improved Detection § Perfect code for channel estimation, i. e. zero SLL § Binary codes (1 bit DAC versus multi-bit DAC) § Zero-mean codes for improved DC offset cancellation § Selected code should support a parallel Low complexity matched filter architecture § Maximum code length of 128 for multiple XTALs support (up to 50 ppm, ± 25 ppm @ Tx/Rx). § Should support SC & OFDM Submission 17 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Spreading Codes § Golay complementary codes of various length N (a. N , b. N) are the spreading codes of choice § Each code has a low SLL and a wide ZCZ § The combination of their periodic & aperiodic autocorrelation provides a perfect code § Only 1 bit DAC & 1 bit ADC § Admit a very low-complexity highly parallelizable architecture § Key enabler for a low complexity synchronization, channel estimation & above all a common mode engine Submission 18 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Spreading Codes summary § SYNC/SFD codes: • a 128 = [05 C 99 C 5005369 CAFFA 3663 AF 05369 CAF] • b 128 = [F 5396 CA 0 F 5 C 66 C 5 F 0 AC 6935 FF 5 C 66 C 5 F] § CES codes: • a 256 = [TBD] • b 256 = [TBD]; § Header & Data codes: • a 64 = [DE 21212174748 B 74]; • b 64 = [2 ED 1 D 1 D 184847 B 84]; § Note : Hexadecimal convention: 5 = “ 0101” (i. e. MSB to LSB) Submission 19 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Spreading Codes Properties Preamble Golay codes § § § D = [64 32 8 2 16 1 4]; W = [++++-++] a 128 = [05 C 99 C 5005369 CAFFA 3663 AF 05369 CAF] b 128 = [F 5396 CA 0 F 5 C 6 6 C 5 F 0 AC 6935 FF 5 C 66 C 5 F] Header/Data Golay codes § § D = [16 8 32 16 1 4]; W = [+-+-++] a 64 = [DE 21212174748 B 74]; b 64 = [2 ED 1 D 1 D 184847 B 84]; Submission 20 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Spreading Codes Implementation input DD(0) + - DD(1) + - + + § DD(M-1) - + + Each Delay vector D and weight vector W specify a pair of complementary Golay codes § Highly efficient Golay matched filter with only 14 adders for a length 128 code (“Budisin”) § It provides simultaneous matched filtering with the two complementary codes at once. § Enables same preamble for SC, OFDM & interoperability common mode Submission + 21 Matlab Code function [a, b] = golay. Sub(M, N, D, W); a = [1 zeros(1, N-1)]; b = a; for m=1: M, ii = mod([0: N-1]-D(m), N); an = W(m)*a + b(ii+(1)); bn = W(m)*a - b(ii+(1)); a = an; b = bn; end; return; Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c The Modulator & Mapper Golay Symbol Mapper LUT …, d 2 k+1, … § d 2 k+1 an Chip Level bn DBPSK Chip Level p/2 Rotation cn Or GMSK Modulator Each set of 2 bits will select which Golay code is to be transmitted One symbol = 64 chips One symbol carries 2 bits of information Effective spreading factor 32 Modulation used for both header and data Differential Encoder: • § S 2 P 1 to 2 d 2 k+1 0 0 +a 64 0 1 -a 64 1 0 +b 64 1 1 -b 64 Mapping: • • • § d 2 k p/2 -DBPSK Modulator Chip level differential encoder: Rotator: • Chip level p/2 -rotation: Submission 22 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c The Reed Solomon FEC over GF(28) X g 1 g 0 r 0 matlab code data = round(rand(8, 239)) data = (2. ^[0: 7])*data parity = rsenc(gf(data, 8), 255, 239); parity = parity(: , end-15: end); parity = reshape(de 2 bi(parity, 8)', 1, 128); code = [data parity]; § r 1 g 15 g 3 r 2 Message block Input: m 0, m 1, m 2, r 15 r 14 X … , m 238 X Y Last to enter encoder First out from encoder Code Word Output: m 238, First to enter encoder Last out from encoder … , m 2 , m 1 , m 0, r 15, …, r 0 Encoding Operation • • • § g 2 Y Step 1. Reset Shift Register (SR) to all zeros. Step 2. The 3 switches are placed in position X and the K = 239 message symbols are fed into the encoder in order of decreasing index; the K message symbols are simultaneously sent out. Step 3. After the last message symbol (m 0) has been fed into the Shift Register (SR), the switches are moved to position Y. At this point the SR contain the remainder generated by the division operation. These symbols are then shifted out of the SR. Systematic Encoding for an RS(K+16, K) shortened from RS(255, 239) over GF(2 8) • • Primitive polynomial: P(z) = z 8 + z 4 + z 3 + z 2 + 1 with root z = 00000010 Generator polynomial: g(x) = ∏i=1: 16(x-zi) Symbol representation: m = b 7 z 7 + b 6 z 6 + … + b 0 = [b 7 b 6…b 0] where b 7 is the msb and b 0 is the lsb message polynomial: m(x) = m 0 + m 1 x +. . . + m 238 x 238 with (m. K: 238 = 0) Step 1. Multiply the message polynomial m(x) by x 16, m(x)x 16 = [0 0. . . 0 m 1. . . m 238] Step 2. Divide x 6 m(x) by g(x). Let r(x) be the remainder: x 16 m(x) = q(x). g(x) + r(x) Step 3. Set c(x) = x 16 m(x) + r(x) , i. e. c(x) = [m 238. . . m. K-1 … m 0 r 15. . . r 0], m. K-1 is transmitted first & r 0 is transmitted last in time Submission 23 Ismail Lakkis, Tensorcom Y

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c The Scrambler sn Serial Data In Scrambled/Descrambled Serial Data Out xn D xn-1 vn D D xn-14 D Seed Value: xinit = [x-1 x-2 … x-15] PRBS out first 16 bits: [x 0 x 1 … x 15] 0011 1111 111 0000 1000 xn-15 matlab code function [data. Out] = tc. Scrambler(data. In, Fast) shift. Register = [0 0 ones(1, 13)]; for k = 0: length(data. In) -1, feedback = xor( shift. Register(13+(1)) , shift. Register(14+(1)) ); data. Out(k+(1)) = mod(data. In(k+(1))+feedback , 2); shift. Register = [feedback shift. Register([0: 13]+(1))]; end; return; Submission 24 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c The FCS & HCS X g 1 g 0 r 1 Encoding Operation § FCS: MAC Frame Payload (M = 32) • • • § r. M-1 r. M-2 matlab code (indexing from 1 rather than 0) r = ones(1, M); for k = 1: K, f = mod(d(k) + r(M), 2); r = mod([0 r(1: M-1)] + f*g(1: M), 2) end; r = xor(r(M: -1: 1), 1) § g. M-1 g. M-2 g 2 Y Message block Input: m 0, m 1, …, m. K-1 X Y First to enter encoder Last out from encoder X Step 1. Reset Shift Register (SR) to all ones. Step 2. The 3 switches are placed in position X and the K bits are fed into the encoder. Step 3. After the last bit (m 0) has been fed into the Shift Register (SR), the switches are moved to position Y. At this point the SR contains the CRC bits. These bits are then shifted out of the SR and complemented. FCS generator polynomial: • g(x) = x 32 + x 26 + x 23 + x 22 + x 16 + x 12 + x 11 + x 10 + x 8 + x 7 + x 5 + x 4 + x 2 + x + 1 • = [11101101101110000011001000001] MAC payload message polynomial: • m(x) = m 0 + m 1 x +. . . + m. K-1 x. K-1 with (m. K-1 = lsb of first octet of MAC payload) HCS: PHY & MAC headers (M = 16) • • Y FCS generator polynomial: • g(x) = x 16 + x 12 + x 5 + 1 = [100000010001] PHY & MAC headers polynomial (m 119 is first bit of PHY header & m 0 is last bit of MAC header) • m(x) = m 0 +. . . + m 79 x 79 + m 80 x 80 + … + m 119 x 119 Submission 25 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c The Pulse Shaper § The Pulse shaper is left up to the implementer. It can be implemented in digital and/or analog. Examples: • • 1. 2. 2. 3. GMSK or Linearized GMSK pulse with BT=0. 5 (recommended); pure GMSK with BT = 0. 5 (recommended); Square-root raised cosine with roll-off=0. 25 with clipping /lifting; Square-root raised cosine with roll-off=0. 25 without clipping Submission 26 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Unified Frame Format § § § Unified Frame Format Key Features Frame Format: Single Carrier Frame Format: OFDM Frame Format: Common Mode Submission 27 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Unified Frame Format Concept 64 Common mode ±a 64 ±b 64 OFDM mode 512 chips ~ 300 ms CP OFDM Data Block CP 256 chips ~ 148 ns a. M SC Data Burst 32, 64, 96, & 128 0, 16, 32, & 64 SC mode a. M OFDM Data Block SC Data Burst a. M 32, 64, 128, or 256 PCES Data Slot Long : Tpreamble = 2. 963 ms Short: Tpreamble = 1. 333 ms PLCP Preamble PLCP Header Packet/Frame Sync Sequence (Long Preamble: 30 Codes, Short Preamble: 8 Codes) PSDU CES Channel Estimation Sequence SFD: Start Frame Delimiter 128 a 128 -a 128 a. N & b. N are a complementary Golay codes pair of length N Submission 28 a 128 a. CP 128 a 256 a. CP b 256 -a 128 Ismail Lakkis, Tensorcom b. CP

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Unified Frame Format Features § A PCES (Pilot CES) field is transmitted periodically to reacquire the channel in both SC and OFDM; § Variable length Golay codes are used for this field; § Preamble HW is reused during re-acquisition no extra cost § Mode specific frequency/timing tracking • Pilot tones for OFDM • CP as a known Golay code for SC § Highly complex channel tracking is no longer needed § The OFDM FFT(512) engine can be implemented as 2 smaller FFT(256) engines allowing HW reuse in SC mode with FDE (Frequency domain Equalization) which requires FFT(256) & IFFT(256) Submission 29 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Frame Format: Single Carrier § The modulation of choice for low complexity low power devices § Support for 3 device classes: • Class I (LDR): Low-Data-Rate, Low-power, low-complexity (Constant Envelope option) • Class II (MDR): Medium-Data-Rate, Quasi-constant envelope (QPSK) with data rates up to 3 Gbps • Class III (HDR): High-Data-Rate, non-constant envelope (8 PSK & 16 QAM) with data rates up to -DBPSK/GMSK with data rates 50 Mbps-1. 5 Gbps p/2 6 Gbps § Medium size FFT(256) & i. FFT(256) for FDE is enough for all practical environments § Known Golay code of variable length will serve as CP. This puts the CP at works instead of being a Waste. § The Golay prefix will be used for timing, frequency and channel tracking if desired. § Pilot CES are used to re-acquire the channel Submission 30 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Frame Format: OFDM § The modulation of choice for HDR (16 -QAM and above), § Data rates up to 6 Gbps § Allows future data rates extension without RF HW change § FFT size of 512 allows operation in extremely harsh environments with very large delay spread § Periodic pilot CES would alleviate the channel tracking task and reduces the sync engine tremendously § SC with 16 -QAM presents no advantages over OFDM § We need both SC & OFDM for different applications! Submission 31 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Frame Format: Common Mode § Common mode: necessary for interoperability between different devices & different networks § It requires no additional circuitry to that used during preamble detection; it comes for free! § Very low complexity with a single multiply and add (in serial implementation) § Requires only Reed Solomon Code, already needed for the header! § Used for beaconing, signaling and for BR (Base Rate) data packets § The key enabler of collision avoidance between different networks Submission 32 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Unified PLCP Header Aggregation Header Default Header RATE (5 bits) R 0…R 4 0: 4 RATE Number of (sub) Frame Sub-Frames LENGTH Number (5 bits) (16 bits) (5 bits) S 0: S 4 5: 9 L 0…L 15 10: 25 SC (Mbps) 000001 F 0: F 31 26: 30 OFDM (Mbps) CP mode (2 bits) PCESL mode (2 bits) PCESP mode (1 bit) Reserved C 0: C 1 31: 32 U 0: U 1 33: 34 P 0 35 R 0: R 3 36: 39 CP Mode 720 PCESL Mode 35: 39 PCES Length SC sub-Frame N FEC mode (2 bits) 35: 39 SC OFDM 00 00 32 00 16 64 01 64 128 10 32 96 10 128 256 11 64 128 11 256 RES 50 Mbps CM 108 Cyclic Prefix Length (5 bits) sub-Frame 1 sub-Frame 2 FEC mode (2 bits) OFDM PCESP Mode 35: 39 PCES Period SC OFDM 00 2048 01 4096 00010 216 1440 00011 432 2160 00100 864 2520 00101 1296 2880 00110 1512 4320 00111 1728 5040 01000 2592 919 01001 3024 1837 01010 3213 2205 01011 3888 1837 01100 4536 3674 01101 4820 4409 01110 5184 RES SFD Header Rate SC Rate Header Rate OFDM Rate 01111 6048 RES -1+1 50 Mbps 50 -1296 Mbps 50 Mbps 720 -1440 Mbps 10000 6426 RES -1 -1 432 Mbps 1512 -6426 Mbps 720 Mbps 2160 -5040 Mbps 10001: 11111 3213 RES Submission § If the number of sub-Frames = 1 than it is a default header, otherwise it is an aggregation header § Header is nominally transmitted at the default base rate of 50 Mbps § Optional Higher Header Rate for MDR & HDR 33 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Single Carrier Mode § § § Key Features Rate Related Parameters Timing & Frame Related Parameters Short Spreading Codes Structured LDPC FEC Submission 34 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c SC Rate Dependent Parameters Submission 35 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c SC Timing & Frame Parameters Submission 36 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Short Spreading Codes dn Serial Data In @ rate R § § Spread Data Out sn @ chip Rate xn D xn-1 [x-1 x-2 … x-15] = [xx 11 1111] Spreader seed ID = [0 0] or [0 1] or [1 0] or [1 1] D D xn-14 D xn-15 For low spreading code length (8 and below), there are no good codes. Use a varying spreading code generated by an LFSR • SC time spreading and • OFDM frequency spreading matlab code function [data. Out] = tc. Spreader(data. In, spreader. Seed. Id, Fast) shift. Register = [spreader. Seed. Id ones(1, 13)]; for k = 0: length(data. In) -1, feedback = xor( shift. Register(13+(1)) , shift. Register(14+(1)) ); data. Out(k+(1)) = mod(data. In(k+(1))+feedback , 2); shift. Register = [feedback shift. Register([0: 13]+(1))]; end; return; Submission 37 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c STLPDC § Supports rate ½, ¾, and 7/8 § Very low complexity systematic encoder § Low complexity highly parallelizable decoder § Throughput matched to that of RS § 1 RS and 1 LDPC Decoder engine is needed for LDR devices § Throughput of 1728 Mbps with Master clock of 215 MHz (BW/8) and 64 iterations Submission Rate 1/2 3/4 7/8 KK 288 432 504 NN 576 576 dmin 14 10 6 38 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c STLDPC: Rate ¾ & 7/8 Parity Check Matrices § Parity check matrix H is specified by an exponent matrix E, i. e. H = JE § Matrix J is the cyclic shift of the 18 x 18 Identity matrix, i. e. § J = 0; J 0 = I; J 18 = I E 78: Rate 7/8 E 34: Rate 3/4 Submission 39 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c STLDPC: Rate ½ Parity Check Matrix E 12: Rate 1/2 Submission 40 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c STLDPC Performance Submission 41 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c OFDM Mode § § § Rate Dependent Parameters Timing Related Parameters Frame Related Parameters Transmitter Reference Diagram The Convolutional Encoder Submission 42 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c OFDM Rate Dependent Parameters Submission 43 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c OFDM Timing Parameters Submission 44 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c OFDM Frame Related Parameters Submission 45 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c PSDU Formation Frame Payload FCS M Zero Bits (Tail Bits) Pad Bits (zeros) Scramble & Append M Zero Bits Convolutional Encoder & Puncturer Bit Interleaver QPSK/ QAM Mapper Scrambled Unscrambled Scrambled Frame Payload FCS Tail Bits Pad Bits LENGTH octets 32 b Mb Npad bits Scrambled PSDU OFDM Modulator LDPC LENGTH: Number of octets in the frame payload 32: Length in bits of the FCS M: number of tail bits (0 for LDPC & 6 for convolutional) NIBPS: number of information bits per OFDM symbols Submission 46 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c The Convolutional Encoder/ Interleaver Convolutional Encoder 1 Convolutional Encoder 2 DEMUX Block Interleaver 20× 24 MUX Convolutional Encoder 8 Convolutional encoder: R = 1/3, K = 7 An D xn D D D Bn Cn Rate Source Data 1/2 x 0 2/3 x 0 x 1 3/4 x 0 x 1 x 2 4/5 x 0 x 1 x 2 x 3 7/8 x 0 x 1 x 2 x 3 x 4 Submission Encoded date Bit Stolen Data Period #Stolen Bits A 0 B 0 C 0 A 0 C 0 3 1 A 0 B 0 C 0 A 1 B 1 C 1 A 2 B 2 C 2 A 0 B 0 C 1 C 2 9 5 47 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Constellation Mapper QPSK constellation mapping Input Bits (b 2 k, b 2 k+1) Iout Q-out 00 +1 +1 01 +1 -1 10 -1 +1 11 -1 -1 d. Q(k) 10 b 2 k+1 +1 +1 00 -1 16 -QAM mapping Input Bits b 4 k , b 4 k+1, b 4 k+2 , b 4 k+3 dk I-out dk Q-out 0000 +1 +1 0001 +1 +3 0010 +1 -1 0011 +1 -3 0100 +3 +1 0101 +3 +3 0110 +3 -1 0111 +3 -3 1000 -1 +1 1001 -1 +3 1010 -1 -1 1011 -1 -3 1100 -3 +1 1101 -3 +3 1110 -3 -1 1111 -3 -3 Submission 11 -1 01 b 4 k+1 b 4 k+2 b 4 k+3 d. Q(k) 48 d. I(k) 1101 1001 0101 1100 1000 0100 -3 -1 +1 1110 1010 0110 1111 1011 0111 +3 d. I(k) Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c MAC Added Features Submission 49 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Aggregation Mode MPDU-1 MPDU-2 MPDU-M Subframe N CRC-2 Subframe 2 CRC-2 Subframe 1 CRC-1 MAC & PHY Headers Preamble SIFS Block ACK (corresponding To the N subframes) • PHY aggregation mode is highly efficient, minimizes the memory requirement at the device and is compliant with IEEE 802. 15. 3 b MAC • MAC should support very lengthy MSDUs (and consequently very long MPDUs) or aggregated MPDUs, ; PHY will fragment the frame into subframes, protect each subframe with its own CRC and allow retransmission of a subframe rather than the entire frame. • • The number of subframes can be negotiated between different devices. Once these parameters are negotiated they stay the same during one session. This reduces the overhead and these parameters need not be transmitted every frame or before each subframe. • If errors occur at the receiving device, the receiving device will request from the transmitting device the retransmission of only those subframes in error and not the entire MPDU. This will increase the overall efficiency and capacity of the system. Submission 50 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Simulation Results Submission 51 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Simulation Assumptions § Channel Bandwidth = 1720. 32 MHz § AWGN, CM 13, CM 23, CM 31 (Golden Set) § Omnidirectional antennas at both ends § 50 ppm XTAL (± 25 ppm @ each side) § Simulation includes • • • Submission Coarse/fine frequency acquisiton & tracking Channel estimation Frequency domain MMSE Equalizer Soft bit generation TLDPC & RS decoding 52 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Long Preamble Miss Detection & False Alarm Submission 53 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Simulation Results: AWGN Submission 54 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Simulation Results: CM 13 (CP=0) Submission 55 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Simulation Results: CM 31 (CP=64) Submission 56 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Simulation Results: CM 23 (CP=64) Submission 57 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Link Budget: AWGN (8%PER) Submission 58 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Link Budget: CM 31 (8%PER) Submission 59 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c PHY-SAP Throughput • Assumptions: – MPDU (MAC frame body + FCS) length = 16384 Octets – SIFS = 2. 5 ms – MIFS = 0. 5 ms MPDU Length Throughput @ 756 Mbps Throughput @ 1512 Mbps Throughput @ 2605 Mbps Throughput @ 3968 Mbps 16384 586 1172 2020 3077 Submission 60 Ismail Lakkis, Tensorcom

July 9, 2006 doc. : IEEE 802. 15 -0760 -00 -003 c Summary § Dual-mode SC (Single Carrier) / OFDM for different classes of devices § SC is the mode of choice for low complexity medium data rate § OFDM is the modulation of choice of very high data rate § Low-complexity interoperability common mode for interoperability between different devices/networks § Unified common frame format enabling a single HW supporting SC / OFDM § Link Adaptation & Unequal Error Protection via low – complexity Structured Turbo LDPC, convolutional Codes / RS § Balanced Channelization with multiple XTAL support Submission 61 Ismail Lakkis, Tensorcom