The World Leader in HighPerformance Signal Processing Solutions
- Slides: 30
The World Leader in High-Performance Signal Processing Solutions Optimizing Data Converters for High Frequency Operation 1. ADCs - Ping-Pong Architectures 2. ADCs – Driving Them 3. DACs – Sinc Compensation 4. DACs – Glitches 5. What They Didn’t Teach You in School
Ping Pong ADCs References Analog Dialogue 37 -8 (August 2003) Analog Dialogue 39 -5 (May 2005) http: //www. v-corp. com/ Do a Patent Search on Inventor: Velazquez; Classification: 341/118 1
Nyquist Theorem Limits Frequency Bandwidth 2
Ping-Pong ADCS Architecture 3
Ping-Pong ADCS Raw Spectral Response 4
Ping-Pong ADCS Matching Requirements Performance Requirement at 180 MHz SFDR Gain Matching (d. Bc) (%) Aperture Matching (fsec) 12 Bits 74 . 04 0 12 Bits 74 0 350 12 Bits 74 . 02 300 14 Bits 86 . 01 0 14 Bits 86 0 88 14 Bits 86 . 005 77 5
Advanced Filter Bank (AFB) Reduces Spurs Due to ADC Mismatch 6
Ping Pong ADCs Trimmed SFDR 7
Ping Pong ADCs Temperature Effects 8
Linear Error Compensation (Lin. Comp) Corrects for Non-Linearities 9
Driving ADCs References Analog Dialogue 39 -4 (April 2005) Analog-Digital Conversion Seminar (2004) 10
Transformer Coupling Gives Best High Frequency Performance 11
ADC Drive 12
Dual Transformers Improve Balance at High Frequencies 13
Baluns Have a Wider Frequency Response 14
Applying Voltage Gain Can Improve Noise Performance 15
DACs Some Things You May Not Have Thought Of Sinc Compensation Effects Glitch Energy 16
DACs Suffer From Sinc Response d. B Frequency (x. Fs) 17
Use Sinc Compensation to Reduce Passband Droop d. B Frequency (x. Fs) 18
Passband is Flat But There is 3. 5 d. B Insertion Loss d. B Frequency (x. Fs) 19
Sinc Compensation Doesn’t Work So Well at Super Nyquist Bands d. B Frequency (x. Fs) 20
AD 9779 Vs AD 9777 Time Domain Plot Both DACs synthesizing a 1 MHz sine wave in 1 x interpolation mode with a 160 MSPS clock rate. Due to the unique output stage of the AD 9779, its time domain waveform has much more glitch energy than the AD 9777 AD 9779 21
Glitches Are Worse but Noise Floor is Better 22
Glitches Are Worse but 3 rd Order IMD Is better 23
Things They Don’t Teach You In School u Watch ALL your inputs u Proper Decoupling u Differential Signaling u Clean Your Clock 24
How many Inputs Does a Data Converter Really Have? A A D VD VA D A CSTRA Y Analog I/O Clock ANALOG CIRCUITS A Reference A DIGITAL CIRCUITS CSTRA IA Y AGND A = ANALOG A GROUND PLANE "QUIET“ DIGITAL BUFFER LATCH NOISY DATA BUS B ID DGND A DV D = DIGITAL GROUND PLANE D 25
Power Supply Decoupling Must Be Effective at Very High Frequencies 26
Why Differential Signaling? 27
How Clean Does Your Clock Need To Be 1000 300 tj (ps) 4 100 ENOB = SNR – 1. 76 d. B 6. 02 6 8 30 10 10 300 100 30 tj (ps) 10 12 3 3 14 1 PLL WITH VCO 1 16 0. 3 18 0. 1 0. 3 PLL WITH VCXO DEDICATED LOW NOISE XTAL OSC 0. 03 1 3 10 30 100 300 FULL-SCALE ANALOG INPUT FREQUENCY (MHz) 0. 1 0. 03 1000 28
In Conclusion u Hopefully you learned something u Getting good high-frequency performance is tough u But there are some things you can do to get the best performance you can u Thank you for your kind attention u Please talk to you friendly local ADI Sales Engineer when you’re ready to start your next design 29
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