HSPICE 20060531 lilingzhou 1982163 com HSPICE v SPICE

HSPICE 简介 周伶俐 2006/05/31 lilingzhou 1982@163. com

一. HSPICE 简介 v SPICE (Simulation Program for Integrated Circuits Emphasis) v PSpice (Micro. Sim Corp. ) ——PC version of SPICE v HSpice (Avant!. ) ——runs on workstations and larger computers

Hspice的流程 前端功能 Schematic HSPICE Netlister HSPICE Simulation Wave Data 后处理 Analysis Meta. Lib CDF Symbol Library Parameter Changes 反标注

Hspice的输入——网单文件 v v v 例（The Star-Hspice netlist for the RC network circuit） ： *title A SIMPLE AC RUN. OPTIONS LIST NODE POST. OP. AC DEC 10 1 K 1 MEG. PRINT AC V(1) V(2) I(R 2) I(C 1) V 1 1 0 10 AC 1 R 1 1 2 1 K R 2 2 0 1 K C 1 2 0. 001 U. END

举例 SIMPLE RTL INVERTER $ Title *Circuit Description VCC 4 0 5 VIN 1 0 PULSE 0 5 2 NS 2 NS 30 NS RB 1 2 10 K Q 1 3 2 0 Q 1 RC 3 4 1 K . MODEL Q 1 NPN BF 20 RB 100 TF. 1 NS CJC 2 PF $ Device Model * Analysis. DC VIN 0 5 0. 1 . TRAN 1 NS 100 NS *Output. PLOT DC V(3) . PLOT TRAN V(3) (0, 5) . PRINT TRAN V(3) . END $Necessary

二. 词法 v v v v 1. 不区分大小写（case insensitive） 2. 标题行——第一行 3. 注释：* or $ 4. 续接符：+ 5. 非线性器件要用. MODEL statement. 6. 0, GND!, GROUND 表示全局地. 7. 表示数量的词尾: T(= 1 E 12 or 10+12); G(= E 9); MEG(= E 6); K(= E 3); M(= E-3); U(= E-6); N(= E-9); P(= E-12), and F(= E-15)，默认是 国际单位。（关键不要搞错M和MEG） 8. Output variables：（后面会有详细的讲解） Voltage between two nodes: v(n 1, n 2) Voltage of a node relative to ground: v(n 1) Current through an independent source: i(vin)

2. . PARAM statement v Syntax: . PARAM <parametername> = <Expression>' v Example: . PARAM width = 20 u . PARAM length = 'sqrt(width)*1. 65' M 1 3 2 0 0 NMOS width length

3. . DATA statement v . PARAM width = 10 u . PARAM length = 6 u . PARAM RL = 1 K M 1 3 2 0 0 NMOS width length Rload 3 5 RL . TRAN 1 n 1000 n SWEEP DATA=D 1 . AC DEC 10 1 hz 1 GHz SWEEP DATA=D 1 . DATA D 1 width length RL + 50 u 20 u 1 K + 60 u 10 K + 100 u 25 u 1 K . ENDDATA

. ALTER Vin node 1 node 2 dc h 1 . alter change VIN=5 . PARAM h 1=5 V v. ALTER FF . DEL LIB 'D: TESTPROCESS. 6 U BCD V 0. 1 PHASE 1. lib' TT . LIB 'D: TESTPROCESS. 6 U BCD V 0. 1 PHASE 1. lib' FF SS TT FF SF FS v

1. The most important rules v no duplicate nodes 不能重复定义节点 v zero for your ground node 地确定是 0 v no floating nodes 不要有悬空节点

3. 元器件描述（续） －－几种常用电源 v Sinusoidal sources Vname N 1 N 2 SIN(VO VA FREQ TD THETA PHASE) Vname = VO + VA exp[-THETA. (t - TD)] sin[2 pi. f (t - TD) + (Phase/360)] v PWL Vname N 1 N 2 PWL(T 1 V 1 T 2 V 2 T 3 V 3. . . ) Example: Vgpwl 1 2 PWL(0 0 10 U 5 100 U 5 110 U 0) r 间隔时间 v Pulse Vname N 1 N 2 PULSE(V 1 V 2 TD Tr Tf PW Period)

4. 子电路 v v v v 下面是由前面举例的CMOS反相器组成的 三级反相器链网表： ……. global vdd. SUBCKT INV IN OUT wn=1. 2 u wp=1. 2 u Mn out in 0 0 NMOS W=wn L=1. 2 u Mp out in vdd PMOS W=wp L=1. 2 u. ENDS X 1 INV WN=1. 2 U WP=3 U X 2 1 2 INV WN=1. 2 U WP=3 U X 3 2 OUT INV WN=1. 2 U WP=3 U CL OUT 0 1 PF VCC VDD 0 5 V ……

5. . GLOBAL xx v This statement causes all nodes numbered xx, whether in the main circuit or a subcircuit, to be connected together. v 注意：Global的使用需格外小心，一般仅把 电源定义成Global

. DC对参数的扫描 v 例如：vin 1 2 dc H 1 . param H 1=10 v . dc H 1 0 20 1 v 对温度的扫描： . dc temp -20 80 1

3. . TRAN Statement v . TRAN: . TRAN var 1 START=start 1 STOP=stop 1 STEP=incr 1 or. TRAN tincr 1 tstop 1 <tincr 2 tstop 2. . . tincr. N tstop. N> + <START=val> <UIC> 起始时刻和步长都指的是输出打印的时刻点，计算的时 间步长由hspice自己决定。UIC参数表示使用. IC语句 指定的节点初始值。 例：. TRAN. 1 NS 25 NS 1 NS 40 NS START=10 NS 0－25 ns，步长 0. 1 ns, 25 ns-40 ns, 步长 1 ns; 从10 ns开始输出 结果。. TRAN 1 NS 100 NS $以 1 ns的步长输出到 100 ns

4. . AC Statement v . AC: 一般频域扫描： . AC type np fstart fstop <SWEEP var start stop incr> Or. AC type np fstart fstop <SWEEP var type np start stop> Or. AC var 1 START = start 1 STOP = stop 1 STEP = incr 1 例：. AC DEC 10 1 K 100 MEG 1 k. Hz-100 MHz, 每 10倍频 10个采样点。

Ac type 一共有4种 DEC – decade variation. OCT – octave variation. LIN – linear variation. POI – list of points. v 例如. AC DEC 10 1 K 100 MEG. AC LIN 100 1 100 HZ. AC DEC 10 1 10 K SWEEP cload LIN 20 1 pf 10 pf. AC DEC 10 1 10 K SWEEP rx POI 2 5 k 15 k v

Lis文件中输出的噪声分析结果 1 ****** Star-HSPICE -- 1999. 4 (19991220) 22: 12 04/16/2002 pcnt ****** . title ac sweep example ****** noise analysis tnom= 25. 000 temp= 25. 000 ****** frequency = 1. 0000 hz **** resistor squared noise voltages (sq v/hz) element 0: r 1 total 8. 233 e-20 rx 5. 0000 **** total output noise voltage = 8. 233 e-20 sq v/hz = 286. 9260 p v/rt hz transfer function value: v(1)/v 1 = 1. 0000 equivalent input noise at v 1 = 286. 9260 p /rt hz **** the results of the sqrt of integral (v**2 / freq) from fstart upto 1. 0000 hz. using more freq points results in more accurate total noise values. **** total output noise voltage = 0. volts **** total equivalent input noise = 0. …….

. PRINT, . PLOT and. PROBE v Examples: v. PLOT DC V(1, 2) V(3) I(Vmeas) v. PRINT TRAN V(3, 1) I(Vmeas) v. PLOT AC VM(3, 0) VDB(4, 2) VM(2, 1) VP(3, 1) IR(V 2) v 注意：使用par计算参数的值 例：print dc i 1=par(‘V(X 1. node 3)’)

gain v Vin node 1 node 2 dc 10 ac 1 v. ac dec 10 1 k 1 meg v. print vdb(‘vout’) v. print vdb(‘vout/vin’) v. print ac gain=par('vdb(vout)') v Vout是输出节点。

2. Options statement v . OPTIONS: 该语句允许用户重新设置程序的参数或控制程序的功能。常用的一 些如下： node: 列出个节点的元件端点，便于查错； post: 使输出数据可以使用 Avant. Waves 浏览(即将数据输出 到post processor； list: 列出元件列表； MEASDGT：. MEASURE语句输出的有效数字位数 v 语法：MEASDGT = x，The value of x is typically between 1 and 7, although youcan set it as high as 10. The default value is 4. 0.

2. . IC or. NODESET v This statement provides an alternative way to specify initial conditions of nodes (and thus over capacitors). . IC Vnode 1 = value Vnode 2 = value etc. . NODESET Vnode 1 = value Vnode 2 = value etc.

sweep 参数扫描，可以扫描data和参数(包括temp) 例如. TRAN 200 P 20 N SWEEP TEMP -55 75 10 . temp -55 75 10 . TRAN 200 P 20 N v v . TRAN 1 n 100 n SWEEP DATA=devinf . DATA devinf width length thresh cap + 50 u 30 u 1. 2 v 1. 2 pf + 25 u 1. 0 v 0. 8 pf + 5 u 2 u 0. 7 v 0. 6 pf . ENDDATA v

3. 常见的错误 v v Failure to converge (OP and DC) – The DC solver uses an iterative method to find the operating point, but some circuits exist which have no or multiple operating points. The best solution is to perform hand analysis of your circuit to make sure that you haven’t done this. No DC Path to ground (OP and DC) – This often happens with floating MOSFET gates. Just add a resistor between the node and ground, or use the. IC or. NODESET commands to create an initial condition. Be warned, however, that. NODESET and. IC can cause convergence problems. Stability Problems (TRAN) – Sometimes a transient analysis shows a “ringing” or oscillation that shouldn’t be there. This can often be solved by reducing the maximum time step or using slower rise and fall times for independent sources. 注意：不要把HSPICE的lib和要仿真的网表放在中文目录下，或者把网 表名改成中文名。

Thanks!