Finite State Machines Sources Gang Quan Univ of
- Slides: 24
Finite State Machines Sources Gang Quan Univ. of Notre Dame
Review l Data Flow Graph – data dependency l Control/Data Flow Graph – control dependency l How about a reactive system?
Finite State Machine l What ? If the driver turns on the key, and does not fasten the seat belt within 5 seconds then an alarm beeps for 5 seconds, or until the driver fastens the seat belt, or until the driver turns off the key
An FSM Key_on/Start timer Alarm Off Timer>10, or belt_on, or key_off /Stop timer Key_off /Stop timer Wait Timer>5 Alarm On
An FSM (Cont’d) • States • Alarm off, Alarm on, Wait • Initial State • Alarm off • Inputs • Turn on/off the key, fasten the seat belt, timer reads • Outputs • Start/stop the timer • Start transitions • Alarm off + Turn on the key Wait • Output • Alarm off + Turn on the key start the timer
Finite State Machine l FSM = ( S, I, O, s 0, , ) – S = {s 0, s 1, …, sk} – I = {i 1, i 2, …, im} – O = {o 1, o 2, …, on} – – l : S x I S (Transition function) : S x I O (Output function) Given an input sequence, an output sequence is produced which is depended on s 0, , and.
Representation • Given • States • Alarm off (s 0), Alarm on (s 1), Wait (s 2) • Initial State • Alarm off (s 0) • Inputs • Turn on/off the key (i 0/i 1), fasten the seat belt (i 2), timer > 5 (i 3), time > 10 (i 4) • Outputs • Start/stop the timer (o 0/o 1)
Transition Graph i 0/o 0 Alarm S 0 Off S 1 i 1/o 1 i 2 (i 1+i 2+i 4)/o 1 S 2
Transition Function • Transition Function s 1 = s 0 * i 0 s 0=s 1*i 1 s 2=s 1 * i 3 s 0=s 2*(i 1+i 2+i 4) • Output Function O 0 = s 0 * i 0 O 1=s 1*i 1 O 1=s 2*(i 1+i 2+i 4)
Transition Table State i 0 i 1 i 2 i 3 i 4 S 0 S 1 X X Output S 1 X S 0 S 2 X X X: don’t care S 2 X S 0 i 1 i 2 i 3 i 4 S 0 o 0 - S 1 o 1 - S 2 o 1 o 1
Mealy Machine and Moore Machine l Mealy Machine – The output is a function of both the current state and the input l Moore Machine – The output is only a function of the current state
Transition Graph For Moore Machine Key_on Init/stop timer stop alarm Timer>10, or belt_on, or key_off Timer /Start Timer Key_off Timer<=5 Wait Timer>5 Alarm /Start Alarm
Mealy/Moore Machine l An FSM can be realized either by Mealy or Moore machine l Mealy machine may use less flip-flops and output signals are immediately after the transition l Moore machine may use more flip-flops and output signals valid except during the transition
Nondeterministic FSM l Deterministic FSM – Given a state and input, there is exactly one next state l Nondeterministic FSM (NFSM) – Given a state and input, there maybe more than one next state, or a state can transform from one state to anther without any input, or for some given input there no next state at all l For any NFSM, there is always one equivalent FSM
Nondeterministic FSM For unknown/unspecified behavior • Less states, more compact • Useful for • • Optimization • Verification Can be refined • For any NFSM, there is always one equivalent DFSM •
NFSM and FSM i 2/ i 0/o 0 S 0 (i 1+i 2+i 4) /o 1 i 1/o 1 S 1 i 2 S 2 i 3/ i 1/ i 0/o 0 S 0 i 4/ i 2 i 1/o 1 S 2 i 0/ i 2/ S 1 i 1/o 1 i 2/o 1 i 4/o 1 i 0/ i 3/ i 4/
Equivalence FSMs are equivalent iff for any given input sequence, identical output sequences are produced l Two
Equivalence 0/0 1/1 S 0 1/1 1/1 S 2 1/1 S 0 0/0 S 3 0/0 S 1 0/0 1/1 0/0 S 1
Minimization l What – Given an FSM, find the equivalent FSM with a minimum number of states l l How Two states s 1 and s 2 in an FSM are equivalent iff each input sequence beginning from s 1 yields an output sequence identical to that obtained by starting from s 2
Minimization(Moore Machine) For each pair of the states (si, sj) If si and sj have different output Mark si and si as not equivalent End for Do for each unmarked pair for each input, si and sj are transferred to states which are not equivalent Mark si and sj as not equivalent end for until no mark is possible Unmarked pairs are equivalent
Minimization 0 S 0/0 1 0 S 2/1 1 S 1/1 S 3/1 0 0 (s 0, s 1) (s 0, s 2) (s 0, s 3) (s 1, s 2) (s 1, s 3) (s 2, s 3)
Minimization S 0/0 0 S 2/1 1 1 S 3/1 0 0, 1 (s 0, s 1) (s 0, s 2) (s 0, s 3) (s 1, s 2) (s 1, s 3) (s 2, s 3)
• Review for Exams (1) 1. Finite State Machine Types 1. 2. 3. 2. Timing of Machine 1. 2. 3. 4. 3. Synchronous Asynchronous Globally Asynchronous Locally Synchronous Memory in Logic Determinism 1. 2. 3. 4. Mealy Moore Rabin-Scott Deterministic Non-deterministic Probabilistic Entangled (only in quantum) What is attached to Machine 1. 2. 3. 4. Reactive Subsumption Architecture Stack Machine Turing Machine Hybrid Machine
• Review for Exams (2) 1. 2. 3. 4. 5. What is minimization of a Finite State Machine? Show example of state minimization Show example of output minimization Show example of input minimization What is state assignment of FSM? Remember that I do not require full procedures for minimization, verification, partitioning, decomposition or state assignment. I require only understanding of these concepts.
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