ECE 406 Design of Complex Digital Systems Lecture

ECE 406 – Design of Complex Digital Systems Lecture 5: Expressions Spring 2007 W. Rhett Davis NC State University with significant material from Paul Franzon, Bill Allen, & Xun Liu W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 1

Summary of Last Lecture l How many test vectors are in an exhaustive stimulus? l How do you annotate time in a stimulus? l What is the most convenient system task to print the output during a simulation? l What keyword do you use when creating a dataflow behavioral description? W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 2

Today’s Lecture Expressions & Operands l Operators: l » Bitwise, Reduction » Shift, Arithmetic » Conditional, Logical, Relational, Equality » Concatenation, Replication W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 3

Expressions l l l Expressions are simply a combination of operands and operators which produce a result. Operands provide the data evaluated by the expression. Operators act on operands to produce desired results. What are the operands and operators in the expression: ADDR [7: 4] == (PORT - 1) W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 4

Numeric vs. Logical Operand Values The data contained in an operand has two possible interpretations: l Numeric Value is simply the numeric value of the operand. l Logical Value is 1 (true) or 0 (false) or x (undetermined), regardless of what the numeric value may be. » If numeric value is 0, the logical value is 0 (false). » If numeric value is not 0, the logical value is 1 (true). » EXCEPT: If any bit in the numeric value is x or z, the logical value is x (indeterminate). W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 5

Numeric vs. Logical Operand Values Numeric Value Logical Value 1’b 1 1’b 0 8’d 124 5’b 1_0 z 10 16’h 0000 W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 6

Today’s Lecture Expressions & Operands l Operators: l » Bitwise, Reduction » Shift, Arithmetic » Conditional, Logical, Relational, Equality » Concatenation, Replication W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 7

Bitwise Operators l Main bitwise operators are » » l l l negation (~) and (&) or (|) xor (^) carried out bit-by-bit on the operand(s). If operands are of unequal size, the shortest is left-extended with 0’s. If a bit is x or z, it affects that bit position only. 1&x x 0&x 0 1|x 1 0|x x 1^x x 0^x x W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 8

Bitwise Operators Expression Result 4’b 0110 & 4’b 0101 4’b 0110 | 4’b 0101 4’b 0110 ^ 4’b 011 x ~4’b 0110 W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 9

Bitwise Operators l The following are also operators… » nand (~&, &~) » nor (~|, |~) » xnor (~^, ^~) l l l …but they don’t always work! Instead, use ~(A & B), rather than A ~& B I promise not to ask you if you don’t ask me! W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 10

Reduction Operators l Unary operators that reduce the bits of a vector to a scalar (single-bit) result based on the operation specified. » and (&) » or (|) & 4’b 1011 evaluates to » xor (^) & 4’b 1111 evaluates to | 4’b 1011 evaluates to ^ 4’b 1011 evaluates to ~| 4’b 1011 evaluates to How do you tell the difference between reduction operators and bitwise operators? W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 11

Today’s Lecture Expressions & Operands l Operators: l » Bitwise, Reduction » Shift, Arithmetic » Conditional, Logical, Relational, Equality » Concatenation, Replication W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 12

Shift Operators l Shifts the bits of a vector right (>>) or left (<<) by the specified number of bits. » <operand> <shift operator> <shift count> l Vacated bits are filled with zero’s l Result is the same size as the left operand. 3’b 100 << 1 yields 4’b 1100 >> 3 yields W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 13

Verilog 2001: Arithmetic Shift l Verilog 2001 adds Arithmetic right-shift (>>>) and left-shift (<<<) operators l The arithmetic right-shift sign-extends the operand, but only if is a signed value 3‘b 111>>>3'd 1 3'sb 111>>>3'd 1 W. Rhett Davis with minor modification by Dean Brock yields UNCA ECE 406 Spring 2007 Slide 14

Arithmetic Operators l l Binary: » Add (+) » Subtract (-) » Multiply (*) » Divide (/) » Modulus (%) Unary: » Negate (-) W. Rhett Davis with minor modification by Dean Brock l All arithmetic is two’s complement l The operands are leftextended with zeros to match » the destination variable’s length » The longer operand’s length UNCA ECE 406 Spring 2007 Slide 15

Arithmetic Result Vector Lengths l When working with fixed length vectors, always be mindful of the possibility that the result of an operation may contain more bits than the number of bits in the operand. » » l wire [3: 0] x; wire [4: 0] y; assign x = 4’b 1010 + 4’b 111 // evaluates to 4’b 0001 assign y = 4’b 1010 + 4’b 111 // evaluates to 5’b 10001 Note: » A+B typically needs MAX{length(A), length(B)}+1 bits » A*B typically needs length(A)+length(B) bits W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 16

Full Adder A 0 0 1 1 W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 B 0 0 1 1 Ci 0 1 0 1 S 0 1 1 0 0 1 Spring 2007 Co 0 0 0 1 1 1 Slide 17

Full Adder l Write a complete verilog description for a Full Adder Cell: module fadd(output s, co, input a, b, ci); • • • endmodule // fadd W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 18

Today’s Lecture Expressions & Operands l Operators: l » Bitwise, Reduction » Shift, Arithmetic » Conditional, Logical, Relational, Equality » Concatenation, Replication W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 19

Conditional Operator This operator pair selects between two operands based on the logical value of a third operand. The syntax is: <condition_operand> ? <true operand> : <false operand> If the logical value of the condition_operand is true then the true_operand is the result. If the logical value of the condition_operand is false then the false_operand is the result. So in the statement Y = Select ? A : B; , Y = A if the logical value of Select is true. Otherwise, Y= B. W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 20

Logical Operators that produce logical values » logical and (&&) - binary » logical or (||) - binary » logical not (!) - unary l These use the logical value of the operand(s). 4’b 0110 && 4’b 0000 4’b 0110 || 4’b 0000 ! 4’b 0110 ! 4’b 0000 W. Rhett Davis with minor modification by Dean Brock evaluates to logical 0 (false). evaluates to logical 1 (true). evaluates to logical 0 (false) evaluates to logical 1 (true). UNCA ECE 406 Spring 2007 Slide 21

Relational Operators that compare numerical values and produce logical values » greater than (>) » less than (<) » greater than or equal to (>=) » less than or equal to (<=) 4’b 0110 < 4’ 0000 4’b 0110 >= 4’b 0110 W. Rhett Davis with minor modification by Dean Brock evaluates to logical 0 (false). evaluates to logical 1 (true). UNCA ECE 406 Spring 2007 Slide 22

Undefined Results l For arithmetic, logical, and relational operators: » if an x or z appears in any bit of either operand, the result of will be x. l For the conditional operator: » if an x or z appears in any bit of the condition operand, the result will be x. » if an x or z appears in any bit of the true or false operand, the result will be x for that bit position only. W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 23

Equality Operators l Operators that compare numerical values and produce logical values » logical equality (==) » logical inequality (!=) l l l If operands are of unequal size, the shortest is left -extended with 0’s. Return an x if any bit in the operands is an x or z. The case equality (===) and case inequality (!==) operators compare the operands bit-by-bit including x and z, but these are not synthesizable and will be ignored in this class. W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 24

Today’s Lecture Expressions & Operands l Operators: l » Bitwise, Reduction » Shift, Arithmetic » Conditional, Logical, Relational, Equality » Concatenation, Replication W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 25

Concatenation Operator The concatenation operator pair ({, }) is used to combine two operands into a single vector. The format of a concatenation is: {operand_1, operand_2, …, operand_n} The operands may be any combination of scalars, vectors, bit-selects, part-selects and sized constants. W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 26

Concatenation Operator Examples: If A = 4’b 1010; B = 4’b 1100, x =1’b 0; y = 1’b 1; {A, B} yields 8’b 10101100 {x, y, B} yields 6’b 011100 {A[3: 2], B[1]} yields 3’b 100 NOTE: Can also be used on the left-hand side of an assign statement! Example: Assuming A and B are 16 -bit vectors, the following are equivalent: assign B = {A[7: 0], A[15: 8]}; assign {B[7: 0], B[15: 8]} = A; W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 27

Full Adder l l Recall the full adder from slide 18 Re-write the Full Adder module using the concatenation operator and only 1 assign statement: module fadd(output s, co, input a, b, ci); • • endmodule // fadd W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 28

Replication Operator A replication constant can be used to specify repetitive concatenation of the same operand. A constant outside the { } specifies how many times the operand is replicated. If A = 4’b 1100; B = 4’b 0110; (note the nested brackets) { 4{A} } gives 16’b 1100 { {2{A}}, {2{B}}} gives 16’b 1100 0110 W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 29

Sign-Extending Right Shifter l l Design a Module that shifts a 4 -bit input to the right 0 to 3 bits, depending on a shift input. Use only replication and conditional operators: in 1010 W. Rhett Davis with minor modification by Dean Brock s 0 1 2 3 out 1010 1101 1110 1111 UNCA ECE 406 Spring 2007 Slide 30

Schematic for the Right-Shifter W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 31

Sign-Extending Right Shifter • module rightshift(output [3: 0] out, input [3: 0] in, input [1: 0] s); • • • endmodule // rightshift W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 32

Summary l Does every numeric value have a corresponding logical value? l How do you tell the difference between a bitwise operator and a reduction operator? l How are vectors extended when operand lengths are mismatched? l What operator would you use to implement signextension? W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406 Spring 2007 Slide 33