Chapter 8 Overview Programmed IO Interrupt Driven IO

Chapter 8 Overview • Programmed I/O • Interrupt Driven I/O

Digressing How do you do the following in the LC-3 ? (good test question ? ) • Shift left • Rotate left • Shift right • Rotate right

One Pass vs Two Pass Assemblers • Two Pass – Checks for syntax errors and builds the Symbol Table during first pass, resolves operand addresses during second pass. • One Pass – Checks for syntax errors, builds the Symbol Table, and resolves operand addresses during the first pass. So why have a two pass?

More than One Object (Load) File • Symbol Table Symbols Start Number Data External Imports Data Value • Addresses x 3000 x 300 A x 300 D ? The “Linker/Loader” would generate another “global table to resolve Externals & Exports at Load time

Input / Output Memory Mapped I/O – A section of the memory address space is reserved for I/O Registers rather than general memory locations. Think of it as “pseudo” memory. The same instructions are used for general programming and I/O programming. Non-Memory Mapped I/O – There is a separate address space for I/O programming, and an entirely separate set of I/O Instructions.

LC-3 has Memory Mapped I/O LC-3 Memory Layout: x 0000 – x 00 FF Trap vectors x 0100 – x 2 FFF System Programs & Data x 3000 – x. FDFF User Programs Area x. FE 00 – x. FFFF I/O Programming “Registers”

Synchronous vs Asynchronous I/O Synchronous – latest value of data could be expected to be available when the program wanted it. It might be periodically updated at a know frequency. This is not typical nor usually realistic for I/O. Asynchronous – computer is generally much faster than I/O so program must wait until requested data is available or data provided has been taken. “Handshaking” is used to ensure that data is available or I/O device is ready.

Polling vs Interrrupt Driven I/O Polling – program checks handshaking signals to find when data is available of device is done (typically a loop in the program) Interrupt – program initiates I/O and waits until data is available (typically goes to sleep until the operating system wakes the program up)

Keyboard Input Interface

Keyboard Input Registers KBDR: Assigned to x. FE 02 Data is in KBSR: KBDR[7: 0] Read only Register Assigned to x. FE 00 Status is in KBSR[15] Set to “ 1” when new data is ready Cleared when data is read

Simple Program to Input from Keyboard START LDI R 1, A ; Test for BRzp START ; character input LDI R 0, B BRnzp NEXT_TASK ; Go to the next task A . FILL x. FE 00 ; Address of KBSR B . FILL x. FE 02 ; Address of KBDR

Monitor Output Interface

Monitor Output Registers DDR: Assigned to x. FE 06 Data is in DDR[7: 0] DSR: Assigned to x. FE 04 Status is in DSR[15] Set to “ 1” when data is picked up Cleared when new data is written

Simple Program to Ouput to Monitor START LDI R 1, A ; Test to see if BRzp START ; output register is ready STI R 0, B BRnzp NEXT_TASK A . FILL x. FE 04 ; Address of DSR B . FILL x. FE 06 ; Address of DDR

LC-3 Memory Mapped I/O

Echo from Keyboard to Monitor START LDI ECHO R 1, KBSR BRzp START LDI R 0, KBDR LDI R 1, DSR BRzp ECHO STI R 0, DDR ; Test for character input ; Test output register ready BRnzp NEXT_TASK KBSR . FILL x. FE 00 ; Address of KBSR KBDR . FILL x. FE 02 ; Address of KBDR DSR . FILL x. FE 04 ; Address of DSR DDR . FILL x. FE 06 ; Address of DDR

The I/O Routine for the LC-3 Keyboard START ST R 1, Save. R 1 ; Save registers needed ST R 2, Save. R 2 ; by this routine ST R 3, Save. R 3 LD R 2, Newline ; L 1 LDI R 3, DSR BRzp L 1 ; Loop until Monitor is ready STI R 2, DDR ; Move cursor to new clean line LEA R 1, Prompt ; Starting address of prompt string ; Loop L 2 LDR R 0, R 1, #0 ; Write the input prompt BRz Input ; End of prompt string LDI R 3, DSR BRzp L 2 ; Loop until Monitor is ready STI R 0, DDR ; Write next prompt character ADD R 1, #1 ; Increment Prompt pointer BRnzp Loop ; Get next prompt character LDI R 3, KBSR BRzp Input ; Poll until a character is typed LDI R 0, KBDR ; Load input character into R 0 LDI R 3, DSR BRzp L 3 ; Loop until Monitor is ready STI R 0, DDR ; Echo input character ; Input L 3 ; L 4 ; LDI R 3, DSR BRzp L 4 ; Loop until Monitor is ready STI R 2, DDR ; Move cursor to new clean line LD R 1, Save. R 1 ; Restore registers LD R 2, Save. R 2 ; to original values LD R 3, Save. R 3 BRnzp NEXT_TASK ; Do the program's next task

The I/O Routine for the LC-3 Keyboard (2) Save. R 1 . BKLW 1 Save. R 2 . BKLW 1 Save. R 3 . BKLW 1 DSR . FILL x. FE 04 DDR . FILL x. FE 06 KBSR . FILL x. FE 00 KBDR . FILL x. FE 02 Newline. FILL x 000 A Prompt ; Memory for registers saved ; ASCII code for newline . STRINGZ "Input a character>"

I/O Interrupts Requirements for a device to interrupt the processor • The device must have the right to request service • The I/O device must want service • The device request must be at a higher priority than what is being done by the processor or is being requested by other devices • The processor must be completed with the present instruction execution

Device(s) Generating Interrupt Request

Generating the LC-3 Interrupt Request

Servicing an Interrupt The following process is followed to service an interrupt • The CPU enters the Supervisor State • The “context” of the present program is saved (PC, PSW, SP) • The device provides the address of location in the interrupt service routine table where the pointer to the service routine should reside. • The Supervisor loads the address of the service routine into the PC • The service routine is executed (ending with an RTI) • The context of the original program is loaded and the original program resumed