1 1 What Is Microprocessor Microprocessor is a

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(1. 1) What Is Microprocessor ? • Microprocessor is a multipurpose, programmable, clock-driven, register

(1. 1) What Is Microprocessor ? • Microprocessor is a multipurpose, programmable, clock-driven, register based electronics device which accept binary data as a input and process that data according to the instruction and give results as output.

Types of Microprocessor Year Word Size Memory Capacity 4004 1971 4 -bit 1 KB

Types of Microprocessor Year Word Size Memory Capacity 4004 1971 4 -bit 1 KB 8080 1973 8 -bit 64 KB 8085 1976 8 -bit 64 KB 8086 1978 16 -bit 1 MB 80286 1982 16 -bit 16 MB Pentium 1993 64 -bit 4 GB Pentium Pro 1995 64 -bit 64 GB P-III 1999 64 -bit 64 GB

8085 INTRODUCTION 8085 consists of various units and each unit performs its own functions.

8085 INTRODUCTION 8085 consists of various units and each unit performs its own functions. The various units of a microprocessor are listed below Ø Accumulator Ø Arithmetic and logic Unit Ø General purpose register Ø Program counter Ø Stack pointer Ø Temporary register

Ø Flags Ø Instruction register and Decoder Ø Timing and Control unit Ø Interrupt

Ø Flags Ø Instruction register and Decoder Ø Timing and Control unit Ø Interrupt control Ø Serial Input/output control Ø Address buffer and Address-Data buffer Ø Address bus and Data bus

Pin Diagram of 8085

Pin Diagram of 8085

8085 PIN DESCRIPTION Some important pins are : Ø AD 0 -AD 7: Multiplexed

8085 PIN DESCRIPTION Some important pins are : Ø AD 0 -AD 7: Multiplexed Address and data lines. Ø A 8 -A 15: higher order address lines. Ø ALE: used to demultiplex data bus and low order address bus. Ø S 0, S 1: status signals used to indicate type of operation. Ø RD¯: active low input signal read data from I/O device or memory. Ø WR¯: active low output signal write data on memory or an I/O device.

Ø READY: It is used for synchronization. Ø TRAP: highest priority non mask able

Ø READY: It is used for synchronization. Ø TRAP: highest priority non mask able interrupt , vectored interrupt address 0024 H. Ø RST 5. 5, 6. 5, 7. 5: maskable interrupts, vectored interrupt low priority than TRAP Address: RST 7. 5 003 CH RST 6. 5 0034 H RST 5. 5 002 CH Ø INTR¯&INTA: maskable interrupt, non vectored interrupt Address provided by external hardware. Ø IO/M¯: I/O mode(IO/M¯=1) or Memory mode(IO/M¯=0 )

Ø HOLD&HLDA: release the control of buses HLDA is the acknowledgement signal for that.

Ø HOLD&HLDA: release the control of buses HLDA is the acknowledgement signal for that. Ø RESET IN¯: This is input signal. When RESET IN¯ is low µp restarts and starts executing from location 0000 H. Ø SID: Serial input data Ø X 1 X 2 : These are clock input signals. Ø VCC&VSS: VCC=+ 5 Volt & VSS=GND

(1. 2) 8085 OPERATIONS 1. Microprocessor initiated operation Ø Ø Memory read Memory write

(1. 2) 8085 OPERATIONS 1. Microprocessor initiated operation Ø Ø Memory read Memory write I/O read I/O write

8085 OPERATIONS 2. Internal Data Manipulation Ø Ø Ø Store 8 -bit data Perform

8085 OPERATIONS 2. Internal Data Manipulation Ø Ø Ø Store 8 -bit data Perform arithmatic & Logical operation Test for certain condition Sequence the execution of Instructions Store data temporary in stack during execution

8085 OPERATIONS 3. Externally Initiated Operation Ø Ø Reset Interrupt Ready Hold

8085 OPERATIONS 3. Externally Initiated Operation Ø Ø Reset Interrupt Ready Hold

(1. 3)8085 ARCHITECTURE

(1. 3)8085 ARCHITECTURE

(1. 4)Registers of 8085

(1. 4)Registers of 8085

(1. 5)FLAG REGISTER S Z - AC - P - S: Sign flag 1=Negative

(1. 5)FLAG REGISTER S Z - AC - P - S: Sign flag 1=Negative 0=Positive Z: Zero flag is set when result of an operation is 0. Ac: set when carry generated from lower nibble to higer nibble P: Parity flag is set when result contains even number of 1’s. CY: Carry flag is set when there is carry generated by an operation. Rest are don’t care flip flops. CY

(1. 6)TYPES OF INTERRUPT Ø An interrupt is considered to be an emergency signal.

(1. 6)TYPES OF INTERRUPT Ø An interrupt is considered to be an emergency signal. • • • TRAP RST 7. 5 RST 6. 5 RST 5. 5 INTR

SERIAL I/O • SOD • SID

SERIAL I/O • SOD • SID

(1. 7)BUS ORGANISATION • There are three buses in microprocessor • Address bus: 1)16

(1. 7)BUS ORGANISATION • There are three buses in microprocessor • Address bus: 1)16 bit 2)Unidirectional 3)direction(MPU to EXTERNAL device) • Data bus: 1)8 bit 2)Bidirectional • Control bus

BUS STRECTURE

BUS STRECTURE

De multiplexing of buses

De multiplexing of buses

 • AD 7 –AD 0 is connected as inputs to the latch 74

• AD 7 –AD 0 is connected as inputs to the latch 74 LS 373. • The ALE signal is connected to the enable (G) pin of the latch and the OC –Output control – of the latch is grounded • When ALE is high it consider address and when ALE is low it consider as data.

(1. 8)Clock speed • Microprocessor works on clock speed of 3 MHz frequency

(1. 8)Clock speed • Microprocessor works on clock speed of 3 MHz frequency