SERIAL PROCESSORS MACHINE LAYER Part 2 A Yavuz

SERIAL PROCESSORS MACHINE LAYER (Part 2) A. Yavuz Oruç Sabatech Corporation & University of Maryland ©All rights reserved 2005. 9/30/2020 1

Integer (Machine) Multiplication Integer multiplication involves computing the (n+m)-bit product of an n-bit integer, x, called the multiplicand by an m-bit integer y, called the multiplier. Whether or not we handle the signs of the operands explicitly to determine the sign of the product, the multiplication of x by y boils down computing the sum: Multiplying x by 2 i shifts it to the left by i bits, and so the product of x by y is equal to the sum of binary numbers y 0 (xn-1 xn-2 … x 1 x 0)2, y 1 (xn-1 xn-2 … x 1 x 0 0)2, …, ym-1 (xn-1 xn-2… x 1 x 0 0 0… 0)2, where the y. I term in each binary form retains the shifted value of x when it is 1 or it converts it to a string of 0’s when it is 0. 9/30/2020 2

Integer Multiplication (Cont’d) We will let pi = x 2 i, 0 < i < m-1 to represent the shifted values of the multiplicand, x by powers of 2, and refer to the term as the kth partial product, k=0, 1, 2…, m-1. It is readily seen that Thus, the multiplication of x by y can be carried out in m steps by shifting x by one bit to the left and adding it to the kth partial product whenever yk = 1, k = 0, 1, …, m-1. 9/30/2020 3

Integer Multiplication (Cont’d) These steps can be executed in a single for loop as described in the following algorithm: Algorithm 1. 1. (Unsigned Multiplication) {p = 0; for (k = 0; k < m-1; k++) if(yk = 1) p = p + x 2 k; } The product of x by y is accumulated into p after initializing p to 0 and by adding shifted values of x to p. The number of additions is determined by the number of ‘ 1’s in the multiplier. 9/30/2020 4

Signed-digit Multiplication If we assume that ‘ 1’s are independently and identically distributed among the bits of y, the average number of additions in carrying out a multiplication with this algorithm is given by The number of additions can be reduced considerably using what is called a signed digit representation. Rather than use two bits, the signed digit representation uses three bits, 0, 1 and -1 which will be denoted by 1. Hence a number such as 10010 represents 16 -2 = 14, and 11101 represents 16+8 -4 -1 = 19. We can use the sign-digit representation to recode the bits multiplier so as to reduce the number of ‘ 1’ bits. 9/30/2020 5

Signed-digit Multiplication (Cont’d) For example, if we have y = 01111111, we can recode it as 10000001. Both these numbers represent 127, but the latter representation has the advantage of having only two non-zero bits as compared to seven such bits in the former. Therefore, if we use the latter representation to multiply an operand by 127, we will have to perform 1 subtraction and 1 addition only as compared to 7 additions had we used the former representation. The multiplication of integers with recoding requires the conversion of the multiplier from the binary representation into a recoded representation, and an n-bit 2’s complement adder/subtracter to perform both addition and subtraction depending on the recoded multiplier bits. 9/30/2020 6

Signed-digit Multiplication (Cont’d) A straightforward method for recoding the multiplier bits is to use a recoding carry bit to determine what to do with the current multiplier bit as described in the table below: Current Bit Recoding Carry-in Recoding Carry-out Operation Recoded Bit 0 0 0 Shift 0 0 1 0 Add 1 1 0 1 Subtract 1 1 Shift 0 Example Consider the binary sequence 001110110111. With the initial recoding carry of 0, we have the following conversion: Recoding carries 011101101110 Binary sequence 001110110111 Recoded sequence 010011011001 Hence the binary sequence consisting of 8 non-zero bits has been converted into a recoded sequence consisting of 6 non-zero bits, reducing the number of addition/subtraction steps by 2. || 9/30/2020 7

Multiple-Bit Recoding Example. It is possible for the recoded sequence to have as many non-zero bits as the original binary sequence does. For example, recoding 00110011 converted it into 01010101. It is even possible for recoding to lead to more non-zero bits than the non-zero bits in the original binary sequence. For example, recoding 010101 converts it into 11111. || The problem which is identified in the example above can be avoided if we eliminate recoding isolated ‘ 1’s. Since recoding in all other cases will generate no more non-zero bits than the original binary sequence contains, taking care of the isolated ‘ 1’s ensures that recoding the multiplier before a multiplication will result in number of additions and/or subtractions which will never exceed the number of additions when the multiplier is not recoded. 9/30/2020 8

Multiple Bit Recoding (Cont’d) The table below provides a recoding scheme which does eliminate the recoding of isolated ‘ 1’s by examining two bits at a time. Next bit Current bit Recoding Carry-in Recoding Carry-out Operation Recoded Bit 0 0 Shift 0 0 0 1 0 Add 1 0 1 1 1 Shift 0 1 0 0 0 Shift 0 1 1 Subtract 1 1 1 0 1 Subtract 1 1 1 Shift 0 Example: Consider the binary sequence 001010110111. With the initial recoding carry of 0, we have the following conversion. Recoding carries 1111110 Binary sequence 0001010110111 695 in decimal 010101001001 695 in decimal Recoded sequence 9/30/2020 9

Multiple Recoding (Cont’d) Algorithm p = 0; rec_carry = 0; for (k = 0; k < m-1; k++) {switch (yk+1, yk, rec_carry) case 0: rec_carry = 0; break; case 1: p = p + x 2 k; rec_carry = 0; break; case 2: p = p + x 2 k; rec_carry = 0; break; case 3: rec_carry = 1; break; case 4: rec_carry = 0; break; case 5: p = p - x 2 k; rec_carry = 1; break; case 6: p = p - x 2 k; rec_carry = 1; break; case 7: rec_carry = 1; break; } 9/30/2020 10

Signed Integer Multiplication As with adding and subtracting numbers, we can use a signmagnitude notation to multiply signed integers, but the 2’s complementation notation conveniently allows us to handle the signs of operands implicitly in multiplication. That is, the multiplication of two n-bit 2’s complement operands into a 2 n-bit 2’s complement product can be carried out in binary as if the two operands are unsigned numbers. The key to the correct computation of the product, however, is to make sure that the multiplicand is sign-extended to 2 n bits either before multiplication or 1 bit at a time during each shiftand-add step in the multiplication algorithm. 9/30/2020 11

Multiplicand Sign-Extension & Product Correction 9/30/2020 12

Multiplication in Binary Format -4 3 Binary (with a priori sign extension) Binary (without a priori sign extension) 111100 011 --------1111000 000000 +----------110100= -12 (mod 64) -4 -3 Binary (with a priori sign extension) Binary (without a priori sign extension) 111100 101 --------111100 000000 110000 +----------101100 + 100000= 12 (mod 64) 9/30/2020 100 011 --------11100 0000 +---------110100 = -12 (mod 64) 100 101 --------111100 000000 110000 +---------101100 + 100000= 12 (mod 64) 13

Signed Multiplication Analyzed Assuming that m = n, four cases should be considered to analyze 2’s complement multiplication as shown below. In two of the four cases, the product needs to be corrected by subtracting or adding x 2 n to it. Without this correction, the product will not be correct as seen in the third columns of the second and third rows. Multiplicand Multiplier 2 n-bit Product Simplified product Correction x>0 y>0 x y (mod 22 n) x y Not needed x>0 y<0 x ( 2 n – |y|) (mod 22 n) x 2 n – x |y| Add 22 n- x 2 n x<0 y>0 (22 n –|x|) y) (mod 22 n) 22 n – |x| y Not needed x<0 y<0 (22 n –|x|) ( 2 n – |y|) (mod 22 n) |x| |y | - |x| 2 n Add x 2 n It is possible to avoid the correction step in the 2’s complement multiplication described above by sign-extending not only the multiplicand but also the multiplier when the multiplier is negative. 9/30/2020 14

Correction Free Signed Integer Multiplication With the multiplier sign-extended, the term that had to be subtracted or added to correct the product is moved out of the 2 n-bit range of the product, and therefore there is no need for any correction, and the result of the multiplication gives the desired product. To illustrate this with an example, consider the product -4 -3 in the example above. By sign-extending both -4 and -3 to 6 bits, and then multiplying them, we have (26 -4) (26 -3) = 212 -7 26+12 = 12 (mod 26). Operand-1 Operand-2 2 n-bit product Simplified 2 n-bit product x>0 y>0 x y (mod 22 n) x y x>0 y<0 x ( 22 n – |y|) (mod 22 n) 22 n – x |y| x<0 y>0 (22 n –|x|) y) (mod 22 n) 22 n – |x| y x<0 y<0 (22 n –|x|) ( 22 n – |y|) (mod 22 n) |x| |y | 9/30/2020 15

Signed Multiplication Analyzed (Cont’d) Obviously, the latter approach uses more shift-and-add cycles due to the insertion of n extra ‘ 1’ bits after the sign bit of the multiplier. This is avoided by the first algorithm using just one extra cycle at the end of the multiplication process. The equivalence between the two algorithms can be seen by the fact that sign-extending y amounts to adding 22 n-2 n to 2 n-|y| which voids the 2 n term and leads to 22 n-|y|. When y is not signextended, the 2 n term remains in the representation of y and the term x 2 n must be removed from the product x (2 n – |y|) or -x 2 n must be removed from the product (22 n-x) ( 2 n – |y|) to make it correct. This is why we add or subtract x 2 n in the second and fourth rows in table. Furthermore, it is easy to see that the simplified product (after corrections if needed in the first algorithm) is represented accurately in 2’s complement format. That is, with the possible application of corrections and/or using 2 n bits to represent the product, a potential overflow from a positive to negative range of products or from a negative to positive range of products is avoided. 9/30/2020 16

Signed Extended Multiplicand & Multiplier Multiplication Algorithm (2’s complement multiplication with sign extension of both operands) { switch(sign(x)) {case 0: switch(sign(y)) {case 0: p = x y; break; case 1: p = x (22 n-|y|); break; } break; case 1: switch(sign(y)) {case 0: p = (22 n-|x|) y; break; case 1: p = (22 n-|x|) (22 n-|y|); break; } // Set the flags S = sign(p); if(p = 0) Z = 1 else Z = 0; F = 0; } 9/30/2020 17

Sample Output Enter x ( in 4 hex digits): 0005 Enter y ( in 4 hex digits): FFFB Type b to view operands and product in binary, h to view it in hexadecimal, d to view it in decimal, u to view it in unsigned decimal, and a to view it in all: a In binary x= 000000000000000101 y= 111111111111111011 product = 1111111111111100111 In hexadecimal x= 00000005 y= FFFFFFFB product = FFFFFFE 7 In decimal x= +5 y= -5 product = -25 In unsigned decimal x= 0005 y= 65531 product = 4294967271 sign-S overflow-F carry-C zero-Z = = 9/30/2020 1 0 18

Multiplication Algorithm Without Sign Extension of Multiplier Algorithm 1. 1. (2’s complement multiplication without sign extension of multiplier) { switch(sign(x)) {case 0: switch(sign(y)) {case 0: p = x y; break; case 1: p = x y - 2 n x; break; //multiply and correct the product } break; case 1: switch(sign(y)) {case 0: p = (22 n-|x|) y; break; case 1: p = (22 n-|x|) (2 n-|y|) +2 n x; break; //multiply and correct the product } break; } // Set the flags S = sign(p); if(p = 0) Z = 1 else Z = 0; } 9/30/2020 19

Multiplication Circuit The algorithmic description of the 2’s complement integer multiplication can be used to obtain a circuit to perform this multiplication in hardware as shown below. 9/30/2020 20

Multiplication Circuit Explained A multiplier register is used to hold the lower half of the 2 n-bit product. The control logic is including the correction step at the end of the multiplication with the multiplication operation in the algorithm expanded into an iterative shift and add process. The addition of the multiplicand to the partial product is triggered by the detection of a 1 in the right most bit of the multiplier. Addition is followed a right shift of the partial product and multiplier registers. The right most bit of the partial product is moved into the left most bit of the multiplier, and the right most bit of the multiplier is discarded. Hence the product is stored into the partial product and multiplier registers at the end of the multiplication process. A (log 2 n)-bit counter is used in the control logic to determine if all of the bits of the multiplier have been processed. 9/30/2020 21

Multiplication Circuit Explained (Cont’d) The value of n is typically chosen to be a power of 2 such as 16 or 32 in actual multiplier circuits. Whether the multiplicand is added or subtracted to correct the product after the first n shift and add cycles is determined entirely by the sign of the multiplier, i. e. , bit yn-1 which is saved into a flip-flop in the control unit before the multiplication begins. As seen in the figure, the multiplicand is added to the partial product if this bit is 1 and it is subtracted from the partial product if it is 0. Since the partial product is shifted n times to the right, adding (subtracting) x to (from) the partial product register at the end of the multiplication process is equivalent to adding (subtracting) 2 nx from the 2 n-bit product. A clock is used to differentiate the cycles of the multiplication process, The same clock is used to control the timing of shifts, adds and loads of operands in and out of the registers. 9/30/2020 22

Integer (Machine) Division The division of an integer x, called the dividend, by another integer y, called the divisor, involves the computation of two numbers q, called the quotient and r, called the remainder, such that x = q y + r, |r| < |y| and r has the same sign as x. For example, 9/30/2020 x y q r 12 5 2 2 -10 3 -3 -1 14 -4 -3 2 -14 -4 3 -2 23

Division-Without Guessing The division can be carried out in any radix but we will limit our discussion to division in binary radix with the following representations of the dividend, divisor, quotient and remainder: Dividend (x): (m+n)-bit binary number Divisor (y): n-bit binary number Quotient (q): m-bit binary number Remainder (r): n-bit binary number x =(xm+n-1 xm+n-2…x 1 x 0)2 y = (yn-1 yn-2…y 1 y 0)2 q = (qm-1 qm-2…q 1 q 0)2 r = (rn-1 rn-2…r 1 r 0)2 The easiest way to divide x by y is to subtract y from x (or add it to y if their signs disagree) until the absolute value of the remainder r becomes less than the absolute value of y as illustrated in the table below for different sign combinations of dividends and divisors. However, this method may require as many as 2 m-1 subtractions or additions when y = 1. In general, this algorithm requires x/y additions or subtractions to compute a quotient. For an (m+n)-bit dividend and m-bit divisor, this means we may have to perform O(2 n) additions or subtractions which make division very slow. 9/30/2020 24

Division Without Guessing-Example 16 /3 Set remainder to 16, Set quotient (q) to 0 16 -3= 13; q =1; | remainder | > 3 13 -3= 10; q=2; | remainder | > 3 10 -3= 7; q=3; | remainder | > 3 7 -3 = 4; q=4; | remainder | > 3 4 -3 = 1; q=5; remainder = 1 16/-3 Set remainder to 16, Set quotient (q) to 0 16 +(-3) = 13; q =1; | remainder | > |-3 | 13 +(-3)= 10; q=2; | remainder | > |-3 | 10 +(-3) = 7; q=3; | remainder | > |-3 | 7 +(-3) = 4; q=4; | remainder | > |-3 | 4 + (-3)= 1; q=5; remainder = 1 -16 /3 -16/-3 Set remainder to -16, Set quotient (q) to 0 -16 +3 = -13; q =1; | remainder | > 3 -13 +3= -10; q= 2; | remainder | > 3 -10 + 3 = -7; q= 3; | remainder | > 3 -7 + 3 = -4; q= 4; | remainder | > 3 -4 + 3= -1; q=5 ; remainder= - 1 Set remainder to -16, Set quotient (q) to 0 -16 –(-3) = -13; q =1; | remainder | > |-3 | -13 –(-3) = -10; q=2; | remainder | > |-3 | -10 –(-3) = -7; q=3; | remainder | > |-3 | -7 –(-3) = -4; q=4; | remainder | > |-3 | -4 –(-3) = -1; q=5; remainder = -1 9/30/2020 25

Restoring Division We can carry out the division of x>0 by y>0 much quicker if we use an algorithm which computes the bits in the binary representation of y. For this, we use the equation This equation allows us to guess if qm-1 is 0 or 1. More precisely, if the difference on the left with qm-1 = 1 is greater than or equal to y, then we know that q = (1 qm-2…q 1 q 0)2 and else we know that q = (0 qm-2…q 1 q 0)2. Furthermore, this process can be iterated to compute the remaining bits of q using the following sequence of expressions: 9/30/2020 26

Restoring Division (Cont’d) r 0 = x, r 1 = r 0 - qm-12 m-1 y, r 2 = r 1 - qm-22 m-2 y, : rm=rm-1 - q 020 y = r where ri, 0 < i < m, is called the ith partial remainder. During the ith step, the divisor is shifted left m-i times, and then subtracted from the ith partial remainder. If the difference is positive then the corresponding quotient bit qm-i is set to 1. Otherwise, it is set to 0, and the shifted divisor is added back to the partial remainder to restore it to its previous value, and hence the name, restoring division. The following example illustrates these steps in more detail. 9/30/2020 27

Restoring Division-Example. n = 3, m = 4, x = (1000111)2 = 71, y = (110)2 = 6 In decimal In binary r 0 = 71, r 1 = r 0 - q 323 6 > 0 => q 3 =1, r 1 =23 r 2 = r 1 - q 222 6 < 0 => q 2 =0, r 2 = -1 r 2 = r 1 + q 222 6 = 23 (restore) r 3 =r 2 - q 121 6 > 0 => q 1=1, r 3 = 11 r 4 =r 3 - q 020 6 > 0 => q 0=1, r 4 = 5 1101 (quotient) 110 1000111= 71 (dividend) - 110 010111 = 23 110 11111 = -1 + 110 (restore) 01011 = 11 110 0101 = 5 (remainder) 9/30/2020 28

Quotient Overflow When we divide an (n+m)-bit dividend by an n-bit divisor, we may get a quotient which is too large to fit into m-bits. For example, when n = m = 3, dividing 32 by 2 gives 16 which cannot be represented in 3 bits. So when dividing an (n+m)-bit number, x by an n-bit number y, we must assume that x/y < 2 m or x/2 m < y. The table below shows the overflow cases when m=n = 2. To avoid a quotient overflow except when the divisor is 0, we can increase the number size of the quotient to represent all possible quotients. For example, if we increase the number of quotient bits to 4 and still have 4 -bit dividends then all of the 1 entries in the same table except the one at the top left corner will be 0. 9/30/2020 x 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 y=0 1 1 1 1 1 0 0 1 1 1 2 0 0 0 0 1 1 1 1 3 0 0 0 1 1 29

Restoring Division Algorithm (Restoring Division) if( y ≠ 0) and x < y 2 m ) { F = 0; i = m; r = x; while (i > 0) {r = r - y 2 i-1; if (r > 0) qm-i = 1; else { qm-i = 0; r = r + y 2 i-1; } i = i-1; } } else {F = 1; for(i = 0 to m-1) qm-i = 1; r = x; } 9/30/2020 30

Restoring Division Example Enter x (in 8 hex digits): 00000076 Enter y (in 4 hex digits): 0009 Type b to view operands and results in binary, h to view it in hexadecimal, d to view it in decimal, u to view it in unsigned decimal, and a to view it in all: a In binary dividend = 00000000000001110110 divisor = 0000001001 quotient = 0000001101 remainder = 000000001 In hexadecimal dividend = 00000076 divisor = 0009 quotient = 000 D remainder = 0001 In decimal dividend = 118 divisor = 9 quotient = 13 remainder= 1 In unsigned decimal dividend = 0118 divisor = 0009 quotient = 0013 remainder = 0001 sign-S = 0 overflow-F = 0 zero-Z = 0 9/30/2020 31

Non-restoring Division As we have just seen, in restoring division, subtracting a shifted divisor during one of the iterations may lead to a negative partial remainder. Rather than restoring the partial remainder by adding the shifted divisor back to it during that iteration, we add the divisor which is shifted one more position to the right during the next iteration to the partial remainder. This addition offsets the over subtraction and furthermore includes the subtraction that must be carried out during the next iteration If all of this seems to be confusing, consider the following mathematical explanation: ri = ri-1 - 2 m-i y ri+1 = ri-1 - 2 m-i y + 2 m-i y -2 m-i-1 y ri+1 = ri + 2 m-i y - 2 m-i-1 y ri+1 = ri + 2 m-i-1 y 9/30/2020 (This is the partial remainder ri which is negative. ) (This is what ri+1 ought to be after correction. ) (The same as above with ri-1 - 2 m-i y replaced by ri. ) (The same as above after a simple algebra. ) 32

Non-restoring division-Example In decimal r 0 = 71, r 1 = r 0 - q 323 6 > 0 => q 3 =1, r 1 =23 r 2 = r 1 - q 222 6 < 0 => q 2 =0, r 2 = -1 r 3 =r 2 + q 121 6 > 0 => q 1=1, r 3 = 11 r 4 =r 3 - q 020 6 > 0 => q 0=1, r 4 = 5 In binary 1101 (quotient) 110 1000111 = 71 (dividend) - 110 (subtract) 010111 = 23 110 (subtract) 111111 = -1 + 110 (add) 01011 = 11 110 (subtract) 0101 = 5 (remainder) 9/30/2020 33

Non-restoring Division Algorithm (Nonrestoring Division) {if( y ≠ 0) and x < y 2 m ) { F = 0; i = m; r = x; r = r - y 2 i-1; i = i -1; while (i > 0) {if (r > 0) {qm-i = 1; r = r - y 2 i-1; } else { qm-i= 0; r = r +y 2 i-1; } i = i-1; } if(r < 0) r = r + y; F = 0; } else { F = 1; for(i = 0 to 15) qm-i = 1; r = x; } } 9/30/2020 34

Non-restoring Division-Example Enter x (in 8 hex digits): 00000425 Enter y (in 4 hex digits): 0021 Type b to view operands and results in binary, h to view it in hexadecimal, d to view it in decimal, u to view it in unsigned decimal, and a to view it in all: a In binary dividend = 0000000000010000100101 divisor = 00000100001 quotient = 00000100000 remainder = 0000000101 In hexadecimal dividend = 00000425 divisor = 0021 quotient = 0020 remainder = 0005 In decimal dividend = 1061 divisor = 33 quotient = 32 remainder= 5 In unsigned decimal dividend = 1061 divisor = 0033 quotient = 0032 remainder = 0005 sign-S = 0 overflow-F = 0 zero-Z = 0 9/30/2020 35

Division of Signed Integers The division algorithms which have been described above can be extended to the division of 2’s complement numbers in a straightforward way. In particular, when both the dividend and divisor are negative then we can use the same restoring or non-restoring algorithm as before. The subtraction effectively results in addition since the dividend and divisor are both negative. When the dividend and divisor disagree in sign, i. e. , one is positive and the other is negative, then all we need to do is switch the subtraction and addition operations in the iterative process. Again, this will have the effect of forcing the dividend towards 0 with each new subtraction or addition step. Of course, when the dividend is negative, adding a positive divisor to the dividend will move its 2’s complement representation towards 2 n+m since the absolute value of negative numbers in 2’s complement gets smaller as their 2’s complement representation as an unsigned number gets closer to 2 n+m. For example, in 4 -bits, -3 is represented by 13 whereas -2 is represented by 14. 9/30/2020 36

Signed Division-Example 9/30/2020 37

Homework Set 4 Problem 1. Carry out the multiplications below by recoding the multiplier using the multiple recoding bit method. (Assume that both operands are represented in 6 -bit 2’s complement notation. (a) (b) 12 14 23 -4 Problem 2. Use the single bit recoding method to develop a multiplication algorithm for multiplying two n-bit numbers. Implement your algorithm in C and show the output of your program when you multiply 14200 by 245. Problem 3. Design a 16 -bit multiplier using 4 -bit multipliers. Assume that an n-bit multiplier (a) receives two n-bit numbers and outputs their product in 2 n-bits. (b) Problem 4. Use restoring division to perform the following divisions in binary • • 96/5 -125/6 Problem 5. Use non-restoring division to perform the following divisions in binary. (a) 53/5 (b) -142/-6 (c) (d) 9/30/2020 Problem 6. Design a circuit to divide a 16 -bit number by an 8 -bit number using nonrestoring division. You may assume that you an 8 -bit 2’s complement adder circuit. 38