Mitigating Wordline Crosstalk using Adaptive Trees of Counters

Mitigating Wordline Crosstalk using Adaptive Trees of Counters Mohammad Seyedzadeh, Alex Jones, Rami Melhem University of Pittsburgh

Wordline Crosstalk in DRAM Scaling ✔ High Memory Capacity ✖ Voltage Fluctuations DRAM Cells DRCAT: Dynamically Reconfigured Counter based Adaptive Tree Deep-scaled DRAM Cells 2

Wordline Crosstalk in DRAM Row of Cells Wordline Victim Row Aggressor Row Victim Row DRAM Cells Deep-scaled DRAM Cells DRAM Bank • The malicious exploit of this crosstalk by repeatedly accessing a row to induce this effect is known as row hammering. DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 2

Outline • Wordline Crosstalk in DRAM • Probabilistic and Deterministic Solutions • CAT: Counter based Adaptive Tree • Evaluation • Conclusion DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 3

Wordline Crosstalk in DRAM: Related Work Probabilistic Approach Deterministic Approach Deep-scaled DRAM Cells Probabilistic Row Activation (PRA) DRCAT: Dynamically Reconfigured Counter based Adaptive Tree Static Counter Assignment (SCA) 4

Probabilistic Row Activation (PRA) Probabilistic Approach RNG(p) Deep-scaled DRAM Cells • Using a Random Number Generator to refresh the victim rows with the probability of ‘p’. DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 5

PRA Failure Probability for 5 years Probabilistic Row Activation (PRA) Pseudo Random Number RNG Generator (PRNG) LFSR-based Refresh threshold: # of aggressor row accesses before read disturbance errors occur in victim rows. DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 6

Static Counter Assignment (SCA) C 0 . . Cm Cn . . . CN-1 Deep-scaled DRAM Cells ining a t n i a to m Power unters Co e Precis wer h Po Refres DRCAT: Dynamically Reconfigured Counter based Adaptive Tree Deep-scaled DRAM Cells Power t o maint ai Counter ning s Conser va Refresh tive Power 7

Static Counter Assignment (SCA) Unutilized Counters • Non-uniform row access patterns in DRAM banks because of data locality DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 8

How to Efficiently Leverage Counters in the Crosstalk Mitigation? DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 8

Our Solution: Counter-based Adaptive Tree (CAT) Row Address Active Counter Expired Counter DRAM BANK (N rows) DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 9

Our Solution: Counter-based Adaptive Tree (CAT) Row Address Active Counter Expired Counter DRAM BANK (N rows) DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 10

CAT: Counter based Adaptive Tree ² PRCAT: Periodically Reset CAT Ø Burst Refresh Mechanism Ø Reset CAT at the end of each refresh Interval ² DRCAT: Dynamically Reconfigured CAT Ø Distributed Refresh Mechanism Ø Reconfigure CAT during consecutive refresh intervals DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 11

PRCAT: Periodically Reset CAT Burst Refresh C 0 64 ms DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 64 ms 12

PRCAT: Periodically Reset CAT C 0 I 0 Burst Refresh C 1 C 0 64 ms DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 64 ms 12

PRCAT: Periodically Reset CAT I 0 I 1 C 0 I 2 I 3 I 4 C 1 I 5 Burst Refresh C 2 C 3 C 6 C 4 C 5 64 ms DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 64 ms 12

PRCAT: Periodically Reset CAT C 0 I 1 C 0 I 2 I 3 I 4 C 1 I 5 Burst Refresh C 2 C 6 I 6 C 3 C 4 C 6 C 7 C 5 Reset CATthe Root Build CAT from 64 ms DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 64 ms 12

DRCAT: Dynamically Reconfigured CAT I 0 I 1 C 0 I 2 I 3 I 4 C 1 I 5 Distributed Refresh C 2 C 3 C 4 I 6 C 7 C 5 64 ms DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 64 ms 13

DRCAT: Dynamically Reconfigured CAT I 0 I 1 C 0 I 2 I 3 I 4 C 1 I 5 C 4 C 5 I 6 C 6 I 5 C 7 C 2 Distributed Refresh C 2 C 3 • During each row access, the tree structure is traversed sequentially by chasing the pointers to find the counter assigned to a specific row address. 64 ms DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 13

Experimental Settings USIMM Simulator: Two 3. 2 GHz cores, 2 channels(each 8 GB DIMM), 1 rank/channel 8 banks/rank, 64 K rows/bank Synopsys Design Compiler Power Overhead PARSEC, SPEC, Commercial and Biobench DRCAT: Dynamically Reconfigured Counter based Adaptive Tree Performance Overhead Kernel Malicious Attack 14

Power Overhead 30% 25% Probabilistic Row Activation Static Counter Assignment PRCAT DRCAT 20% 15% 10% 5% BIO Mean tigr SPEC mum leslie libq MTF MTC freq PARSEC face ferret black COMM str fluid swapt com 5 com 4 com 3 com 2 com 1 0% • Power overhead for DRCAT in dual-core systems is 4. 5%, which is an improvement over the 12% and 13% incurred in PRA and SCA. DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 15

Performance Overhead 4% 3% Probabilistic Row Activation Static Counter Assignment PRCAT DRCAT 2% 1% BIO Mean tigr SPEC mum leslie libq MTF MTC freq PARSEC face ferret black COMM str fluid swapt com 5 com 4 com 3 com 2 com 1 0% • DRCAT, PRCAT and PRA incur very low performance overhead (<0. 5%). DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 16

Sensitivity Analysis ² Mapping Policy & Number of Cores • DRCAT reduces the power overhead in quad-core systems to 7%, which is an improvement over the 21% and 18% incurred in SCA and PRA. ² Refresh Thresholds • Scaling down DRAM technology exacerbates the crosstalk problem leading to a decrease in the refresh threshold. DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 17

Performance Overhead under Malicious attacks <0. 9% • As expected, more intensive attacks leads to higher ETO since it causes more refreshes. DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 18

Conclusion • Demonstrated that a small number of counters can be implemented on chip to mitigate wordline crosstalk. • Proposed a non-uniform counter assignment, Counter-Based Adaptive Tree, to more precisely determine the aggressor rows. • Introduced a scheme, DRCAT, for dynamically reconfiguring the CAT to track the temporal changes in memory access patterns. • DRCAT avoids wordline crosstalk during normal execution and protects against malicious attacks. DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 19

Thank you for your attention! Question? DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 20

Backup Slides

Hardware Overhead • Hardware energy (per bank) and area of DRCAT, PRCAT and SCA for different number of counters • The specification of the PRNG used for PRA. The reported energy for PRNG (eng_PRNG) is for generating 9 -bits per row access. Energy: dynamic (n. J per row access) and static (n. J per refresh interval) M DRCAT PRCAT Area (mm 2) SCA DRCAT PRCAT SCA PRNG dynamic static 32 3. 05 E-04 5. 77 E+03 2. 91 E-04 5. 55 E+03 1. 41 E-04 3. 16 E+03 3. 16 E-02 3. 04 E-02 1. 86 E-02 Area 4. 0 E-3 64 4. 30 E-04 1. 39 E+04 4. 09 -04 1. 32 E+04 1. 92 E-04 8. 81 E+03 6. 12 E-02 5. 86 E-02 4. 04 E-02 Throughput(Gbps) 2. 4 128 5. 83 E-04 2. 77 E+04 5. 50 E-04 2. 63 E+04 2. 22 E-04 1. 44 E+04 1. 16 E-01 1. 11 E-01 6. 04 E-02 Power(m. W) 7 256 8. 72 E-04 5. 44 E+04 8. 25 E-04 5. 13 E+04 3. 12 E-04 2. 39 E+04 2. 23 E-01 2. 11 E-01 1. 00 E-01 Eff. (nj/b) 2. 9 E-3 512 1. 17 E-03 1. 06 E+05 1. 10 E-03 1. 02 E+05 4. 25 E-04 4. 52 E+04 3. 93 E-01 3. 75 E-01 1. 72 E-01 Eng_PRNG(nj) 2. 62 E-2 DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 21

Static Counter Assignment (SCA) DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 22

Sensitivity to the Maximum CAT depth • Crosstalk mitigation power overhead per bank for DRCAT using from 32 to 512 counters and different maximum CAT levels (6 to 14). DRCAT: Dynamically Reconfigured Counter based Adaptive Tree 23