SYEN 3330 Digital Systems Chapter 3 SYEN 3330 Digital Systems Jung H. Kim Chapter 3 1
Design Hierarchy SYEN 3330 Digital Systems 2
Hierarchical Design SYEN 3330 Digital Systems 3
Reusable Functions and Design SYEN 3330 Digital Systems 4
Top-Down verses Bottom Up SYEN 3330 Digital Systems 5
Analysis Procedure SYEN 3330 Digital Systems 6
Analyze the network below A B' C F T 1 D' SYEN 3330 Digital Systems B E' T 2 7
Analysis (Continued) A B' C F T 1 D' B E' A B' C B E' T 2 T 3=D’+T 2 F T 1 T 4 D' T 3 T 2 SYEN 3330 Digital Systems T 4=T 1 T 3 F = A+T 4 8
Analysis (Continued) A B' C T 1 T 4 D' B E' F T 3 T 2 SYEN 3330 Digital Systems 9
Analyze the Code Converter A F 2 w B F 1 x D C F 0 z y SYEN 3330 Digital Systems 10
Code Converter (Cont. ) SYEN 3330 Digital Systems 11
Truth Tables from Diagrams SYEN 3330 Digital Systems 12
Code Converter Truth Table SYEN 3330 Digital Systems 13
Truth Table Fill-In SYEN 3330 Digital Systems 14
Finish Up Entries SYEN 3330 Digital Systems 15
What Does the Circuit Do? SYEN 3330 Digital Systems 16
Final Note (and warning) SYEN 3330 Digital Systems 17
Logic Design: Functional Blocks SYEN 3330 Digital Systems 18
Review Combinatorial Logic SYEN 3330 Digital Systems 19
Design Procedure SYEN 3330 Digital Systems 20
Code Converter Design SYEN 3330 Digital Systems 21
Example: BCD to Excess 3 Note: All BCD codes greater than "9" can be assigned "Don't Cares" in the K-Map. Such BCD codes are never possible. SYEN 3330 Digital Systems 22
Example (Cont. ): BCD to Excess 3 Minimized Equations: z=D' y=C D + C ' D ' (exnor) x=B ' C + B ' D + B C ' D ' w = A + B C + B D SYEN 3330 Digital Systems 23
BCD to Excess 3 Implementation SYEN 3330 Digital Systems 24