SYEN 3330 Digital Systems Chapter 7 Part 3

SYEN 3330 Digital Systems Chapter 7 – Part 3 SYEN 3330 Digital Systems Jung H. Kim 1

Datapath and Operations Review of Digital Logic Systems · Digital System – a sequential circuit made up of interconnected flipflops and gates. · Gates – implement the logic functions. · Functional Blocks – a collection of gates implementing a specific function. (e. g. multiplexers, adders, shifters, etc. ) · Flip-flops – provide the state variables. · Registers – a collection of flip-flops. · Memory – a large collection of flip-flops (or other storage elements) combined with a method of accessing the flip-flops. · We will study how to organize these elements into two interacting subsystems – Control and Datapath SYEN 3330 Digital Systems 2

Review: A Computer · CPU (Central Processing Unit): Determines a sequence of data processing operations to be performed in the datapath portion. · Datapath: performs basic operation on data stored in registers. · Control: configures data transfers CPU and establish operations to be performed. · Memory: -- A regular array of data storage elements. · Input/Output: -- A collection of devices that store, display and convert information. SYEN 3330 Digital Systems Memory Control Datapath Input/Output 3

Datapath and Control Unit · Control Unit: Determines a sequence Control of data processing Control Datapath operations to be Inputs Unit Output Status performed in the datapath portion. Control Data · Datapath: Performs Outputs Inputs basic operation on data stored in registers. · Control: signals that configure data transfers and establish operations to be performed. · Status: -- signals that represent the state of data, such as overflow bits, “zero” tests, etc. These signals are tested to change the sequence of operations. SYEN 3330 Digital Systems 4

Register Transfer Operations · Resisters – a collection of binary storage flip-flops organized in some logical fashion. · Register Transfer Operations – the movement of data stored in registers and the processing performed on the data. · Three basic components: § Set of registers § Operations § Control · Elementary Operations § Load, count, shift, add, bitwise “OR”, etc. § Elementary operations are called micro-operations. SYEN 3330 Digital Systems 5

Register Transfer R · Register Nomenclature 15 PC(H) 76543210 8 7 0 PC(L) 15 0 R 2 · Letters and numbers – denotes a register (ex. R 2, PC, IR) · Parentheses ( ) – denotes a range of register bits (ex. R 1(1), PC(7: 0), AR(L)) · Arrow ( ) – denotes data transfer (ex. R 1 R 2, PC(L) R 0) · Comma – separates parallel operations · Brackets [ ] – Specifies a memory address (ex. R 0 M[AR], R 3 M[PC]) SYEN 3330 Digital Systems 6

Conditional Transfer · If (K 1 = 1) then (R 2 R 1) is shortened to · K 1: (R 2 R 1) · where K 1 is a control variable specifying a conditional execution condition. · Conditional execution is used to modify the sequence of microoperations. K 1 R 1 n Load R 2 Clock K 1 Transfer Occurs Here SYEN 3330 Digital Systems 7

Microoperations · Logical Groupings: § § Transfer – move data from one set of registers to another. Arithmetic – perform arithmetic on data in registers. Logic – manipulate data or use bitwise logical operations. Shift – shift data in registers. · Arithmetic operations (word – wide) + Addition – Subtraction * Multiplication / Division SYEN 3330 Digital Systems · Logical operations (bitwise) Logical OR Logical AND Logical Exclusive OR ¯ Not 8

Example Microoperations · Add the content of R 1 to the content of R 2 and place the result in R 1 + R 2 · Multiply the content of R 1 by the content of R 6 and place the result in PC. PC R 1 * R 6 · Exclusive OR the content of R 1 with the content of R 2 and place the result in R 1 R 2 SYEN 3330 Digital Systems 9

Example Microoperations (Continued) · Take the 1’s Complement of the contents of R 2 and place it in the PC. PC R 2 · On condition K 1 OR K 2, Logical bitwise OR the content of R 1 with the content of R 3 and place the result in R 1. (K 1+K 2): R 1 R 3 · Note: “+” (as in K 1 + K 2) and both mean “OR”! SYEN 3330 Digital Systems 10

Control Variables · The control variable for an operation appears to the left of the operation and is separated by a colon. · Control variables specify the logical conditions for the operation. · Control Variable values of: § Logic “ 1” – the operation takes place. § Logic “ 0” – the operation is inhibited. SYEN 3330 Digital Systems · Examples: X’ K 1 : R 1 + R 2 X K 1 : R 1 + R 2’ + 1 · Variable K 1 enables the add or subtract operation. · If X=0, then X’ = 1 so X’ K 1 = 1, activating add of R 1 and R 2. · If X=1, then X K 1 = 1, activating add of R 1 and the two’s comp. of R 2 (Subtract) 11

Arithmetic Microoperations · From Table 7 -3 Symbolic Designation Description R 0 R 1 + R 2 Addition R 0 R 1 One’s Complement R 0 R 1 + 1 Two’s Complement R 0 R 2 + R 1 + 1 R 2 minus R 1 (2’s Comp) R 1 + 1 Increment (count up) R 1 – 1 Decrement (count down) · Note that any register may be specified for source 1, source 2, or destination. · These simple microoperations operate on the whole word – except for 1’s complement which is a bitwise operation. SYEN 3330 Digital Systems 12

Logical Microoperations · From Table 7 -4 Symbolic Designation Description R 0 R 1 Bitwise NOT R 0 R 1 R 2 Bitwise OR (sets bits) R 0 R 1 R 2 Bitwise AND (clears bits) R 0 R 1 R 2 Bitwise EXOR (complements bits) SYEN 3330 Digital Systems 13

Logical Microoperations (Continued) · Let R 1 = 1010, and R 2 = 11110000 · Then after “Operation”, R 0 Becomes: R 0 Operation 0101 R 0 R 1 11111010 R 0 R 1 R 2 10100000 R 0 R 1 R 2 01011010 R 0 R 1 R 2 SYEN 3330 Digital Systems 14

Shift Microoperations · From Table 7 -5: Symbolic Designation Description R 1 sl R 2 Shift Left R 1 sr R 2 Shift Right · Let R 2 = 11001001 · Then after “Operation”, R 1 becomes: R 1 Operation 10010010 R 1 sl R 2 01100100 R 1 sr R 2 · Note: These shifts “zero fill”. Sometimes a separate “link” bit can be used to provide the data shifted in, or to “catch” the data shifted out. · Other shifts are possible (circular, arithmetic). SYEN 3330 Digital Systems 15

Register Transfer Structures Multiplexer-Based Transfers Register inputs are connected to multiple sources via a multiplexer. Bus-Based Transfers Register inputs are connected to a single bus driven by a multiplexer. Three-State Bus Register inputs and outputs are connected to a single bus via tri-state drivers. Memory Transfer Registers provide a source for Memory Addresses and a source or sink for Memory Data. Other Transfer Structure Use multiplexers, multiple busses, combinations of all the above, etc. SYEN 3330 Digital Systems 16

Multiplexer-Based Transfers · Multiplexers connected to register inputs produce flexible transfer structures: (Note: Clocks are left off for clarity) · The transfer are: K 1: R 0 R 1 K 2 K 1’: R 0 R 2 Load R 2 K 1 K 2 n Load R 1 SYEN 3330 Digital Systems n 0 S MUX n Load R 0 1 17

MUX-Based Transfers (Continued) L 0 · Multiplexers connected to each register input produces a very flexible transfer structure: n n 0 1 S MUX n Load R 0 L 1 · What transfers are possible with this structures? How many operations can occur in parallel? n n 1 S MUX n Load R 1 L 2 n n SYEN 3330 Digital Systems 0 0 S n MUX 1 Load R 2 18

Bus-Based Transfers L 0 · A single input bus driven by a multiplexer limits the available transfers: n R 0 S 1 S 0 n · What transfers can occur here? Load n n S 1 S 0 0 1 MUX L 1 n n Load R 1 2 L 2 n Load R 2 SYEN 3330 Digital Systems 19

Three-State Bus · The three-input MUX can be replaced by 3 – state buffers. Transfers are still limited L 0 n R 0 n E 0 · What transfers are allowed here? n n L 1 Load R 1 n E 1 SYEN 3330 Digital Systems Load L 2 Load R 2 n E 2 20

Memory Transfer · Memory operations require: § ADDRESS · And require § DATA (write operations), · Or provide § DATA (read operations) · Typically: § There can be more than one memory address source in a system § There can be more than one data source or data sink in a system · Some structure of busses and multiplexers is needed to access the memory. SYEN 3330 Digital Systems 21

Other Transfer Structures · Fast systems require that parallel operations occur within the same clock. § Parallel operations imply “resources” required to move the data § SO: • Multiple busses are used, and • Multiplexers are used to select input sources. · THIS REQUIRES MOER HARDWARE! SYEN 3330 Digital Systems 22

Other Transfer Structures (Continued) · What transfers does this system allow? L 0 S 0 n n 0 1 S n MUX n Load R 0 n E 0 a E 0 b S 1 n n 0 1 S n MUX n L 1 Load R 1 n E 1 a S 2 n n 0 1 E 1 b L 2 n Load S MUX n R 2 n E 2 a E 2 b SYEN 3330 Digital Systems 23