Embedded Systems Anton Biasizzo Institut Jozef Stefan Jamova

Embedded Systems Anton Biasizzo Institut Jozef Stefan, Jamova 39, 1000 Ljubljana, Slovenija anton. biasizzo@ijs. si Embedded systems Slide 1/50

Content q Literature and sources q Introduction q Embedded system architecture q Hardware cores for embedded systems q Embedded system software q Embedded system implementation on FPGA devices Embedded systems Slide 2/50

Literature, sources q Steve Heath: Embedded Systems Design, Newnes, 2003, ISBN 0 7506 5546 1 q Lewin A. R. W. Edwards: Embedded System Design on a Shoestring, Newnes, 2003, ISBN 0 -7506 -7609 -4 q Doug Abbott: Linux for Embedded and Real-Time Applications, Newnes, 2006, ISBN 0 7506 7932 8 q Xilinx: http: //www. xilinx. com q Open. Cores: http: //www. opencores. org q Slides available on http: //salomon. ijs. si/Lectures Embedded systems Slide 3/50

Embedded Systems q Nowadays computer systems are vastly spread q Perceive them as general purpose computer systems: § § § Desktops, Notebooks, Servers, Mainframes, Clusters, Clouds. q General purpose computer systems represent only small fraction of all computer systems Embedded systems Slide 4/50

Embedded Systems q System which use computation to perform a specific function q Embedded within a larger system or environment q Heterogeneous and reactive to environment q Main reason for purchase is not information processing Embedded systems Slide 5/50

Characteristics of Embedded Systems q Application specific q Efficient § Energy, code size, running time, memory, weight, cost, … q Dependable § Reliability, availability, maintainability, security, safety q Real-time constraints § Soft and hard real-time constraints q Reactive – connected to a physical environment § Sensors and actuators q Hybrid § Analog and digital q Distributed Embedded systems Slide 6/50

Comparison Embedded system General purpose computing q Application specific q Broad class of applications q Not programmable by end user q Programmable by end user q Fixed run-time requirement (additional computer power not useful) q Faster is better q Criteria: § § § Cost Power consumption Predictability Reliability … Embedded systems § Cost § Average Speed Slide 7/50

Examples of Embedded Systems Embedded systems in car: q Ignition system q Airbag system q ABS breaks q Navigation q Rain sensing q Cruise control q Alarm system q Automatic parking Embedded systems Slide 8/50

Examples of Embedded Systems Consumer electronics: q Washing machine, q Microwave oven, q Oven, q Dishwasher, q Refrigerator, q Smart phone, q Television, q Home appliances Embedded systems user interface actuators sensors Slide 9/50

Examples of Embedded Systems Smart home: q Light management q Heating system q Recuperation q Air conditioning q Door control q Window control q Alarm system Embedded systems Slide 10/50

Examples of Embedded Systems Communication embedded system: q Routers, q Wireless LAN, q Bluetooth devices, q Sensor networks, … Other: q Medical equipment q Transport § Airplane, § Train, … Embedded systems Slide 11/50

Embedded System Architecture q Embedded system hardware is frequently used in a loop “hardware in a loop” Embedded systems Slide 12/50

Embedded System Architecture Embedded systems Slide 13/50

Embedded System Architecture q Processors § § 8 bitni procesorji (PIC, Z 80, MC 6800, . . . ) 16 bitni procesorji (TI MSP 430, Intel 8086, 80286) 32 bitni procesorji (ARM, Intel 80386, Microblaze, Open. Risc, . . . ) DSP processors q Memory: static RAM, dynamic RAM (DDR), … q External memory: FLASH, ROM, Disk, . . . q Peripheral devices § § § General Purpose Input/Output (GPIO) Serial peripheral devices (UART, SPI, I 2 C, …), Counters, Timers, Interrupt controller, . . . q Analog interfaces: § analog/digital converters, digital/analog converters, power supplies Embedded systems Slide 14/50

Hardware implementation q Discrete components in the past § Configurable logic used as glue logic q Highly integrated devices § Several parts in same chip (processor, memory, UART, . . . ) q System on chip § Whole system is implemented on one chip § Very high integration § Hardware cores described in hardware definition languages (verilog, VHDL, system. C) § Hardware core reuse § IP cores Embedded systems Slide 15/50

Custom hardware implementation q Discrete Logic § Physically large implementation § High power consumption q Application Specific Integrated Circuit (ASIC) § § Very high speed Low power consumption Long design time Lack of flexibility q Field Programmable Gate Array (FPGA) § § § Fine granularity High speed Moderate power consumption Short design time Enables on-field reconfiguration (upgrades) Embedded systems Slide 16/50

FPGA q Logic units (slices) q I/O units q Connections Embedded systems Slide 17/50

FPGA q Suitable for rapid prototyping q High granularity of logic units: § § Gate Lookup table Memory Functional blocks q Communication network § Crossbar § Hierarchical mesh q Reconfiguration § Static configuration (at production, on power-on) § Dynamic reconfiguration (during processing) Embedded systems Slide 18/50

Hardware cores q Processor cores (described in HDL languages) § 8 bitna: pico. Blaze, T 80, . . . § 32 bitna: micro. Blaze, Nios, Open. Risc, Leon, . . . § 64 bitna Open. Sparc, . . . q Data buses § § § AXI (former AMBA) - ARM Wish. Bone – Opencore I 2 C - Phillips Processor Local Bus (PLB) – Xilinx Open Peripheral Bus (OPB) - IBM q Peripheral devices § Serial devices (UART, SPI, JTAG) § Timer/Counters, Watchdog, Interrupt controllers Embedded systems Slide 19/50

Hardware design q Embedded system manual design § Processor and bus selection (IP cores) § Adaptation of input/output devices (IP cores) to the selected bus § Implementation of custom logic in HDL programming language q Commercial design suites § Design using graphic interfaces § Limited number of supported processor cores and buses § Limited number of peripheral devices q Custom hardware core design § Implementation in HDL language (VHDL or Verilog) § Interface to the selected bus Embedded systems Slide 20/50

Embedded system software q Programming languages: § C, C++, Assembly language q GNU development environment § Ported to vast number of different processors and microcontrollers q Standalone application § Program is executed in an endless loop § Suitable for smaller applications (e. g. Arduino) q Applications using operating system § § Suitable for larger applications (e. g. mobile phone) Easier application development Usage of more demanding interfaces (e. g. filesystems, ethernet, …) Larger memory requirements Embedded systems Slide 21/50

General purpose operating systems q Commercial operating systems § DOS, § Windows, § Symbian, . . . q Open source operating systems § § § GNU/Linux, Free. BSD, Net. BSD, Free. DOS, Android, . . . Embedded systems Slide 22/50

Real-Time Operating systems q Soft or Hard Real-Time response is required q Open source real-time operating systems: § Real. Time Linux, § RTAI, § e. COS, . . . q Commercial real-time operating system § QNX, § Vx. Works, § Lynx. OS, . . . Embedded systems Slide 23/50

Embedded system on FPGA device q Hardware implementation on FPGA device § Processor core selection § FPGA design software for translation HDL description of hardware cores into FPGA configuration : o Vivado, o Xilinx ISE, o Plan. Ahead, o Mentor Graphics (Synplicity), . . . § Software suite for building embedded system (Xilinx EDK). q Software implementation § Application development for commercial real-time operating system (commercial design tools) § Application development for open source operating system (GNU development environment – cross compilers). o Petalinux, GNU/Linux § Stand-alone applications Embedded systems Slide 24/50

Embedded system on FPGA device q Example of embedded system design using pico. Blaze processor: § § § Digital clock example, Very simple free 8 -bit processor (Xilinx), Harvard architecture (separate instruction and data paths – memory) Development using Xilinx ISE suite (free form smaller FPGA devices), Assembler generates the instruction memory content (BRAM), q Xilinx EDK suite: § Embedded system hardware design using Xilinx EDK suite, § Development of the custom peripheral core (rotary-encoder), § Embedded system software development using Eclipse SDK (stand-alone application). q Development using open source hardware cores: § Hardware development using Xilinx ISE suite, § Software development using GNU toolchain (cross compiler and assemblers). Embedded systems Slide 25/50

Spartan 3 E Starter Kit prototype board q Spartan 3 E XC 3 S 500 E q 8 LEDs q 4 push-buttons q 4 switches q Rotary-encoder q LCD display q RS 232 DCE port q RS 232 DTE port q VGA port q Ethernet port Embedded systems Slide 26/50

Example with pico. Blaze processor q Very simple processor: § § q Has no data bus 8 -bit processor 16 registers 1024 instructions 256 input/output address space PICOBLAZE KCPSM 3 INPUT IN_PORT OUT_PORT DEVICE OUTPUT DEVICE CLK MEMORY ADDR INSTR ADDR CLK Embedded systems Slide 27/50

Xilinx ISE design suite q Design environment for development of hardware designs on Xilinx FPGA devices q Input device implementation using VHDL language q Display device implementation using VHDL language q Connecting building blocks to a new system q Determining input/output pins of the FPGA device on the prototype board Embedded systems Slide 28/50

Xilinx ISE design suite Embedded systems Slide 29/50

Digital clock implementation q Application specification § Time, date, and week day is displayed on LCD display § Time and date can be set using push-buttons and rotary-encoder. § Week day is calculated by the picoblaze processor. q Create new Xilinx ISE project Embedded systems Slide 30/50

Digital clock implementation q Hardware § Picoblaze processor (kcpm 3), § Display (ura), § System clock and rotary-encoder with push-buttons q Adding hardware cores Embedded systems Slide 31/50

Digital clock implementation q Translation of the hardware description (FPGA configuration) Embedded systems Slide 32/50

Digital clock implementation q Translation of the hardware description (FPGA configuration) Embedded systems Slide 33/50

Digital clock implementation q Software (assembly code for picoblaze) § Compiled code is inserted into FPGA configuration using Data 2 Mem program Embedded systems Slide 34/50

Digital clock implementation q FPGA device programming using JTAG interface. Embedded systems Slide 35/50

Xilinx EDK design suite q Used for embedded system design using Xilinx FPGAs. q Supported processor cores: § Micro. Blaze, 32 -bit soft RISC processor, § ARM processor (hardcoded on the FPGA boundary) § Power. PC processor (hardcoded in the middle of the FPGA device) q Hardware core library: § § Input / Output devices, Interfaces, Buses, Co-processors, . . . q Allows adding custom cores described in HDL language q Support Xilinx prototype boards q Includes software development environment (eclipse) Embedded systems Slide 36/50

Xilinx EDK design suite Embedded systems Slide 37/50

Digital clock implementation using EDK q Application specification § Time, date, and week day is displayed on LCD display § Time and date can be set using push-buttons and rotary-encoder. § Week day is calculated by the micro. Blaze processor. q Create new Xilinx EDK project Embedded systems Slide 38/50

Digital clock implementation using EDK q Digital clock hardware § Micro. Blaze procesor (FPGA device doesn’t have a Power. PC procesorja). § Custom hardware core for rotary-encoder. q Hardware core selection Embedded systems Slide 39/50

Digital clock implementation using EDK q Hardware core selection Embedded systems Slide 40/50

Digital clock implementation using EDK q Software settings Embedded systems Slide 41/50

Digital clock implementation using EDK q Current hardware architecture Embedded systems Slide 42/50

Digital clock implementation using EDK q Adding custom hardware core for rotary-encoder Embedded systems Slide 43/50

Digital clock implementation using EDK q Adding custom hardware core for rotary-encoder Embedded systems Slide 44/50

Digital clock implementation using EDK q Adding custom hardware core for rotary-encoder Embedded systems Slide 45/50

Digital clock implementation using EDK q Hardware architecture with added custom core Embedded systems Slide 46/50

Digital clock implementation using EDK q Digital clock software (stand-alone) Embedded systems Slide 47/50

Digital clock implementation using EDK q FPGA device programming using JTAG interface § It uses the same program as Xilinx ISE suite. § It is integrated into Xilinx EDK suite. § It doesn’t use graphic interface. Embedded systems Slide 48/50

Open source hardware cores q Open. Cores. org q Open. RISC processor or 1200 § ASIC implementation § FPGA implementation q LEON processor (Sparc 32) q Sparc 64 T 1 processor q Implementation: § Xilinx ISE suite or Plan. Ahead suite § Unused parts should be deleted from HDL source code § Manual connection between hardware core is necessary. Embedded systems Slide 49/50

Other open source hardware cores q q q q Arithmetic cores, Communication cores, Cryptographic cores, Memory cores, Multimedia cores, DSP cores, . . . Embedded systems Slide 50/50