Computer Architecture I 1 DT 016 Cary Laxer

Computer Architecture I (1 DT 016) Cary Laxer, Ph. D. Visiting Lecturer

Informationsteknologi Today’s class Introductions n Computer organization overview n Introduction to assembly language programming n Friday, September 28, 2007 Computer Architecture I - Class 1 2

Introductions

Informationsteknologi Instructor n n n Cary Laxer Visiting lecturer Home institution is Rose-Hulman Institute of Technology, Terre Haute, Indiana, USA Professor and Head of Computer Science and Software Engineering Bachelor’s degree in computer science and mathematics from New York University Ph. D. in biomedical engineering from Duke University Friday, September 28, 2007 Computer Architecture I - Class 1 4

Informationsteknologi Course n Information is maintained on the course website: www. it. uu. se/edu/course/homepage/dark/ht 07 n Three weekend meetings ® ® n Friday and Saturday each time Lecture and lab time both days Texts ® ® Structured Computer Organization (Fifth Edition) by Andrew S. Tanenbaum Introduction to RISC Assembly Language Programming by John Waldron Friday, September 28, 2007 Computer Architecture I - Class 1 5

Informationsteknologi Introduce yourselves n Tell us: ® Your name ® Your hometown ® Your computer background ® Something interesting about yourself Friday, September 28, 2007 Computer Architecture I - Class 1 6

Computer organization overview

Informationsteknologi Programs and languages n n Program – a sequence of instructions to perform a certain task High level language – English-like programming languages such as C++, Java, etc. Machine language – computer’s primitive instruction set (e. g. add two numbers, compare a number to 0) Assembly language – mnemonics for machine language instructions Friday, September 28, 2007 Computer Architecture I - Class 1 8

Informationsteknologi Languages, Levels, Virtual Machines A multilevel machine Friday, September 28, 2007 Computer Architecture I - Class 1 9

Informationsteknologi Contemporary Multilevel Machines Friday, September 28, 2007 Computer Architecture I - Class 1 10

Informationsteknologi Milestones in Computer Architecture (1) Friday, September 28, 2007 Computer Architecture I - Class 1 11

Informationsteknologi Milestones in Computer Architecture (2) Friday, September 28, 2007 Computer Architecture I - Class 1 12

Informationsteknologi Computer Generations n n n Zeroth Generation Mechanical Computers (1642 – 1945) First Generation Vacuum Tubes (1945 – 1955) Second Generation Transistors (1955 – 1965) Third Generation Integrated Circuits (1965 – 1980) Fourth Generation Very Large Scale Integration (1980 – ? ) Friday, September 28, 2007 Computer Architecture I - Class 1 13

Informationsteknologi Von Neumann Machine Friday, September 28, 2007 Computer Architecture I - Class 1 14

Informationsteknologi PDP-8 Innovation – Single Bus Friday, September 28, 2007 Computer Architecture I - Class 1 15

Informationsteknologi IBM 360 Friday, September 28, 2007 Computer Architecture I - Class 1 16

Informationsteknologi The Computer Spectrum Friday, September 28, 2007 Computer Architecture I - Class 1 17

Informationsteknologi Personal Computer 1. Pentium 4 socket 2. 875 P Support chip 3. Memory sockets 4. AGP connector 5. Disk interface 6. Gigabit Ethernet 7. Five PCI slots 8. USB 2. 0 ports 9. Cooling technology 10. BIOS Friday, September 28, 2007 Computer Architecture I - Class 1 18

Informationsteknologi Intel Computer Family Friday, September 28, 2007 Computer Architecture I - Class 1 19

Informationsteknologi The Pentium 4 Chip Friday, September 28, 2007 Computer Architecture I - Class 1 20

Informationsteknologi Metric Units The principal metric prefixes. Friday, September 28, 2007 Computer Architecture I - Class 1 21

Introduction to Assembly Language

Informationsteknologi Number systems Decimal (base 10) n Binary (base 2) n Hexadecimal (base 16) n Friday, September 28, 2007 Computer Architecture I - Class 1 23

Informationsteknologi Two’s complement numbers n n Represent negative integers to the computer To determine the two’s complement of an integer: Invert all the bits (make zeroes ones and ones zeroes) ® Add 1 ® n Example: 29 = 0001 1101 Invert all the bits: 1110 0010 ® Add 1: 1110 0011 (this is -29) ® Friday, September 28, 2007 Computer Architecture I - Class 1 24

Informationsteknologi Integer storage and capacities Bit – 0 or 1 (one binary digit) n Nibble – 4 bits, 0 -15 (one hex digit) n Byte – 8 bits, 2 hex digits, 0 -255 or -128 to +127 n Word – 4 bytes, 32 bits, 8 hex digits n ® 0 to 232 -1 or 0 to 4, 294, 967, 295 unsigned ® -(231) to 231 -1 or -2, 147, 483, 648 to +2, 147, 483, 647 signed Friday, September 28, 2007 Computer Architecture I - Class 1 25

Informationsteknologi Characters ASCII (American Standard Code for Information Interchange) n EBCDIC (Extended Binary-Coded Decimal Interchange Code) n Unicode n Friday, September 28, 2007 Computer Architecture I - Class 1 26

Informationsteknologi In-class exercise n Write the number 30010 in: Binary ® Hex ® n Write the number -7810 in: Eight-bit two’s complement binary notation ® 32 -bit two’s complement hexadecimal notation ® n Using one byte to store integers, what happens when you add: 255 + 1 using unsigned numbers ® 127 + 1 using signed numbers ® Friday, September 28, 2007 Computer Architecture I - Class 1 27

Informationsteknologi The MIPS Processor MIPS = Microprocessor without Interlocked Pipeline Stages n It is a RISC (reduced instruction set computer) architecture n Currently used in many embedded systems, such as Ti. VO, Windows CE devices, Nintendo 64, and Sony Playstation 2 n Friday, September 28, 2007 Computer Architecture I - Class 1 28

Informationsteknologi MIPS Memory Organization n Memory is byteaddressable Addresses of memory cells Friday, September 28, 2007 0 x 00000001 0 x. A 0 0 x 00000002 0 x 3 E 0 x 00000003 0 x 10 0 x. FFFFFFFC 0 x 90 0 x. FFFFFFFD 0 x 6 F 0 x. FFFFFFFE 0 x. A 1 0 x. FFFF 0 x 00 . . . Computer Architecture I - Class 1 Each cell holds one byte 29

Informationsteknologi MIPS Memory Layout n 0 x 7 FFFFFFF A program’s address space is composed of three parts: ® ® ® At the bottom of the user address space (0 x 00400000) is the text segment, which holds the program’s instructions Starting at address 0 x 10000000 is the data segment The program stack resides at the top of the address space (0 x 7 FFFFFFF) and grows down Friday, September 28, 2007 Stack segment . . . Data segment 0 x 10000000 Text segment 0 x 00400000 Reserved Computer Architecture I - Class 1 30

Informationsteknologi MIPS Registers n n Program counter (PC) – holds address of next instruction to be executed 32 general purpose registers, numbered 0 -31 Register n is designated by $n or Rn ® Register zero, $0, always contains the hardwired value 0 ® There are conventions governing their use (see Table 3. 1 on page 20 of Waldron) ® n 16 floating point registers $f 0…$f 15 to hold floating point numbers Friday, September 28, 2007 Computer Architecture I - Class 1 31

Informationsteknologi SPIM Simulator Runs programs for the MIPS assembly language on other platforms n Free versions available online (I got a Windows version at http: //pages. cs. wisc. edu/~larus/spim. html) n Friday, September 28, 2007 Computer Architecture I - Class 1 32

Informationsteknologi SPIM I/O n 10 operating system-like services through the syscall instruction n Load the system call code (see Table 3. 2 on page 22 of Waldron) into register $v 0 ($2) Load the arguments into registers $a 0…$a 3 ($4…$7) (or $f 12 for floating point values) Return values are placed in register $v 0 (or $f 0 for floating point results) n n Friday, September 28, 2007 Computer Architecture I - Class 1 33

Informationsteknologi Hello World. text. globl __start: la $a 0, str li $v 0, 4 syscall li $v 0, 10 syscall str: # # execution starts here put string address into a 0 system call to print out a string # au revoir. . data. asciiz "hello worldn" Friday, September 28, 2007 Computer Architecture I - Class 1 34

Informationsteknologi Demonstration n Demo of PCSpim using the Hello World program Friday, September 28, 2007 Computer Architecture I - Class 1 35