Introduction to Computer Architecture COE 308 Computer Architecture

Introduction to Computer Architecture COE 308 – Computer Architecture Prof. Muhamed Mudawar Computer Engineering Department King Fahd University of Petroleum and Minerals

What is “Computer Architecture” ? v Computer Architecture = Instruction Set Architecture + Computer Organization v Instruction Set Architecture (ISA) WHAT the computer does (logical view) v Computer Organization HOW the ISA is implemented (physical view) v We will study both in this course Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 2

Why Study Computer Architecture? v You want to be called “Computer Engineer or Scientist” v You want to become an “expert” on computer hardware v You want to become a “computer system designer” v You want to become a “software designer” and need to understand how to improve code performance v Technology is improving rapidly new opportunities v Has never been more exciting! v Impacts Electrical Engineering and Computer Science Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 3

Which Books will be Used? v Computer Organization & Design The Hardware/Software Interface David Patterson and John Hennessy Morgan Kaufmann Publishers Third Edition (2005) is available in bookstore Read the textbook in addition to the course slides v References: MIPS 32 Architecture Volumes I, II, and III are available online v Course webpage http: //www. ccse. kfupm. edu. sa/~mudawar/coe 308/ Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 4

Course Objectives v Understand modern computers, their evolution, and trade -offs at the HW/SW interface Instruction Set Architecture Computer Arithmetic Performance and Metrics Pipelining v Understand the design of a modern computer system Datapath design Control design Memory System Design I/O System Design Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 5

Five Classic Components v Since the 1940’s, computers have 5 Computer classic components Devices Processor v Input devices Keyboard, mouse, … v Output devices Display, printer, … Input Control Memory Datapath Output v Storage devices Volatile memory devices: DRAM, SRAM, … Permanent storage devices: Magnetic, Optical, and Flash disks, … Together, they are called the Processor v Datapath v Control v Newly added 6 th component: Network © Muhamed CSE 308 – KFUPM Essential component for Mudawar, communication in any computer system Introduction to Computer Architecture Slide 6

Infinite Cycle implemented in Hardware Fetch - Execute Cycle Instruction Fetch Obtain instruction from program storage Instruction Decode Determine required actions and instruction size Operand Fetch Locate and obtain operand data Execute Compute result value and status Writeback Result Deposit results in storage for later use Next Instruction Determine successor instruction Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 7

Instruction Set Architecture (ISA) v Is a subset of Computer Architecture v Definition by Amdahl, Blaaw, and Brooks – 1964 “… the attributes of a [computing] system as seen by the programmer, i. e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. ” v An ISA encompasses … Instructions and Instruction Formats Data Types, Encodings, and Representations Programmable Storage: Registers and Memory Addressing Modes: Accessing Instructions and Data Handling Exceptional Conditions Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 8

Instruction Set Architecture – cont’d v Critical interface between hardware and software Standardizes instructions, machine language bit patterns, etc. Advantage: different implementations of the same architecture Disadvantage: sometimes prevents using new innovations v Examples (versions) Introduced in Intel (8086, 80386, Pentium, . . . ) IBM Power (Power 2, 3, 4, 5) HP PA-RISC (v 1. 1, v 2. 0) 1986 MIPS (MIPS I, III, IV, V) 1986 Sun Sparc (v 8, v 9) 1987 Digital Alpha (v 1, v 3) 1992 Introduction to Computer Architecture © Muhamed CSE 308 – KFUPM Power. PC(601, 604, …) Mudawar, 1993 1978 1985 Slide 9

Overview of the MIPS ISA Registers v All instructions are 32 -bit wide v Instruction Categories Registers Load/Store R 0 - R 31 Integer Arithmetic Jump and Branch Floating Point PC Memory Management HI LO v Three Instruction Formats R-type Op 6 Rs 5 Rt 5 I-type Op 6 Rs 5 Rt 5 J-type Op 6 Introduction to Computer Architecture Rd 5 sa 5 funct 6 immediate 16 immediate 26 © Muhamed Mudawar, CSE 308 – KFUPM Slide 10

Computer Organization v Realization of the Instruction Set Architecture v Characteristics of principal components Registers, ALUs, FPUs, Caches, . . . v Ways in which these components are interconnected v Information flow between components v Means by which such information flow is controlled v Register Transfer Level (RTL) description Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 11

Desktop Computer Organization Processor Monitor Bridge/Memory Controller Graphics Controller External Cache Memory PCI Bus IDE Disk Controller Disk DVD Expansion Bus Interface Expansion Bus Disk Introduction to Computer Architecture Keyboard Serial Port © Muhamed Mudawar, CSE 308 – KFUPM Parallel Port Slide 12

Microprocessor Organization Front Side Bus Intel Net. Busrt Micro-Architecture Frequently used paths Bus Unit Less frequently used paths 2 nd Level Cache D-Cache 8 -way 4 -way Front End Fetch & Decode Trace Cache Execution Microcode ROM Out-of-Order Core BTBs / Branch Prediction Introduction to Computer Architecture Retirement Branch History Update © Muhamed Mudawar, CSE 308 – KFUPM Slide 13

Software Abstraction Layers Application Compiler Assembler Operating System Linker Loader Scheduler Device Drivers Instruction Set Architecture (Interface SW/HW) Hardware Processor Memory I/O System Datapath & Control Design Digital Logic Design Circuit Design Physical (IC Layout) Design v Abstraction hides implementation details between levels v Helps us cope with enormous complexity v ISA is at the interface between software and hardware Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 14

Technology Improvements v Vacuum tube → transistor → IC → VLSI v Processor Transistor count: about 30% to 40% per year Clock rate: about 20% to 30% per year v Memory DRAM capacity: about 60% per year (4 x every 3 yrs) Memory speed: about 10% per year Cost per bit: decreases about 25% per year v Disk Capacity: about 60% per year v Opportunities for new applications v Better organizations and designs Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 15

Growth of Capacity per DRAM Chip v DRAM capacity quadrupled almost every 3 years 60% increase per year, for 20 years Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 16

Clock Rate and Transistor Count 1, 000 100, 000 Clock rate (MHz) 100 10 1 uu i 8008 u i 4004 0. 1 1970 1980 1975 1990 1985 2000 1995 2005 10, 000 Transistor Count u u u R 10000 u u u uu u u Pentium 100 u u u uu uu u u u i 80386 uu i 8086 u u i 80286 u u i 8080 1, 000 100, 000 10, 000 ui 8086 u u i 8080 u u i 8008 i 4004 1, 000 1970 1980 1990 2000 1975 1985 1995 2005 20% to 30% per year Introduction to Computer Architecture u uu R 10000 u u Pentium uu uu u uu uu u u i 80386 i 80286 uu u u. R 3000 u R 2000 u u © Muhamed Mudawar, CSE 308 – KFUPM 30% to 40% per year Slide 17

Workstation Performance Measured as number of times faster than VAX 11/780 Improvement is between 50% and 60% per year More than 1000 times improvement between 1987 and 2003 Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 18

Microprocessor Sales (1998 – 2002) v ARM processor sales exceeded Intel IA-32 processors, which came second v ARM processors are used mostly in cellular phones v Most processors today are embedded in cell phones, video games, digital TVs, PDAs, and a variety of consumer devices Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 19

Microprocessor Sales – cont'd Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 20

Chip Manufacturing Process Blank wafers Silicon ingot Slicer 20 to 30 processing steps 8 -12 in diameter 12 -24 in long < 0. 1 in thick Tested dies Die Tester Dicer Packaged dies Bond die to package Introduction to Computer Architecture Patterned wafer Individual dies Tested Packaged dies Part Tester © Muhamed Mudawar, CSE 308 – KFUPM Ship to Customers Slide 21

Wafer of Pentium 4 Processors v 8 inches (20 cm) in diameter v Die area is 250 mm 2 About 16 mm per side v 55 million transistors per die 0. 18 μm technology Size of smallest transistor Improved technology uses ² 0. 13 μm and 0. 09 μm v Dies per wafer = 169 When yield = 100% Number is reduced after testing Rounded dies at boundary are useless Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 22

Effect of Die Size on Yield Good Die Defective Die Dramatic decrease in yield with larger dies Yield = (Number of Good Dies) / (Total Number of Dies) 1 Yield = (1 + (Defect per area Die area / 2))2 Die Cost = (Wafer Cost) / (Dies per Wafer Yield) Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 23

Inside the Pentium 4 Processor Chip Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 24

Intel x 86 Processor Evolution Processor Year Clock Transistors Registers Data Bus Max Memory Caches 8086 1978 8 MHz 29 K GP: 16 bits 1 MB None 80286 1982 12 MHz 134 K GP: 16 bits 16 MB None 80386 1985 20 MHz 275 K 32 bits 4 GB None 80486 1989 25 MHz 1. 2 M 32 bits 4 GB L 1: 8 KB Pentium 1993 60 MHz 3. 1 M 64 bits 4 GB L 1: 16 K Pentium Pro 1995 200 MHz 5. 5 M GP: 32 bits FP: 80 bits GP: 32 bits FP: 80 bits MMX: 64 b XMM: 128 b 64 bits 64 GB L 1: 16 K L 2: 256 K 64 bits 64 GB L 1: 32 K L 2: 512 K Pentium II 1997 266 MHz 7 M Pentium III 1999 500 MHz 8. 2 M Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 25

Intel x 86 Processor Evolution – cont’d Processor Pentium 4 Year Clock Transistors Registers Micro. Arch Bandwidth Caches GP: 32 bits Trace: 12 Kop FP: 80 bits L 1: 8 K Net. Burst 3. 2 GB/s MMX: 64 b L 2: 256 K XMM: 128 b GP: 32 bits Net. Burst Trace: 12 Kop FP: 80 bits Hyper. L 1: 8 K 3. 2 GB/s MMX: 64 b Threading L 2: 512 K XMM: 128 b 2000 1. 5 GHz 42 M Pentium 4 with Hyper- 2002 2. 2 GHz Threading 55 M Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 26

Course Roadmap v Instruction set architecture (Chapter 2) v Computer arithmetic (Chapter 3) v Performance issues (Chapter 4) v Constructing a processor (Chapter 5) v Pipelining to improve performance (Chapter 6) v Memory: caches and virtual memory (Chapter 7) v Disk Storage and Input/Output (Chapter 8) Key to obtain a good grade: read the textbook! Introduction to Computer Architecture © Muhamed Mudawar, CSE 308 – KFUPM Slide 27