PVSS for VELO and TELL 1 at EPFL

PVSS for VELO and TELL 1 at EPFL 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 1

outlines n n Introduction to PVSS Introduction to SMI++ and FSM (ECS control) VELO – Hybrid’s Low Voltage TELL 1 q q n DIM, fw. Ccpc, fw. Hw Present Developments Outlooks 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 2

PVSS – CERN n n n Historically at CERN the control of equipment not used directly for data acquisition has been called "slow control" In many applications it has become possible to use commercial off-the-shelf (COTS) solutions, with the advantage that the physics community does not need to develop or maintain them. (eng: Process visualization and control system) PVSS (Prozeßvisualisierungs- und Steuerungssystem), from the Austrian company ETM, was selected after a formal tender process in 1999 for use in the slow control systems of the four LHC experiments. CERN provides: q n Volume 45, number 5, June 2005 n A global PVSS Framework LHCb provides: q Specific PVSS components 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 3

PVSS Features – Structure n Open Architecture q q We can write our own managers It can be interfaced to anything (FSM, DIM) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 4

PVSS Features – Distributivity n Highly Distributed q q 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 130 Systems (PCs) tested No major problem found 5

PVSS Features - Datapoint Concept n n DP type DP Standard Interface q All data of all sub-systems defined as Configs 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 6

Building User Interfaces n n Static Part Drag & Drop Dynamic part Control Scripts ("C" like) q few useful calls for accessing DPs: n n n q dp. Get (string dp. Name, <data_type> value) dp. Set (string dp. Name, <data_type> value) dp. Connect (string call-back, string dp. Name) few useful calls for accessing Widgets: n n 24. 07. 2006 get. Value (string widget. Name, string widget. Property, <widget dependent data>) set. Value (string widget. Name, string widget. Property, <widget dependent data>) Cédric Potterat - LPHE Monday Meeting 7

T. S. LHC GAS . . . Det. Dcs 1 Sub. Sys 1 DAQ DCS Det. Dcs. N Sub. Sys 2 Dev 1 Dev 2 Det. Daq 1 Sub. Sys. N Dev 3 DSS . . . Dev N To Devices (HW or SW) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 8 Commands ECS Status & Alarms Abstract levels Central Hierarchy - ECS

Central Hierarchy - ECS INF DCS HV DAI DAQ L 0 TFC HLT LHC VELOA VELOC DCS VELOA VELOC LV LV 24. 07. 2006 VELOA VELOC TEMP VELOA VELOC HV HV VELOC VELOA VELOC DAI VELOA VELOC DAQ VELOA VELOC FEE VELOA VELOC TELL 1 Cédric Potterat - LPHE Monday Meeting 9

FSM – SMI++ n PVSS II does not have tools specifically for: q Abstract behavior modeling n Finite State Machines (FSM) q Automation & Error Recovery n Expert System n But… n n FSM (SMI++) does State Management Interface (SMI++ which was developed for the DELPHI experiment) is used to control the FSM 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 10

FSM – SMI++ n Device Level: Proxies q q C, C++, PVSS ctrl scripts drive the hardware: n n n Abstract Levels: Domains q q q n Internal objects Dedicated language Implement the logical model User Interfaces q 24. 07. 2006 deduce State handle Commands For User Interaction Cédric Potterat - LPHE Monday Meeting 11

FSM – SMI++ n SMI++ - The Language q SML – State Management Language n Finite State Logic q n Parallelism q n Actions can be sent in parallel to several objects. Tests on the state of objects can block if the objects are still “transiting” Asynchronous q 24. 07. 2006 Objects are described as FSMs their main attribute is a STATE Actions can be triggered by logical conditions on the state of other objects Cédric Potterat - LPHE Monday Meeting 12

FSM – PVSS basic Panel ECS DAQ DCS LHC . . . 24. 07. 2006 . . . Cédric Potterat - LPHE Monday Meeting 13

LV – VELO Project n Aim: q q n Control the Low Voltage Power Supplies for the Hybrids Each Hybrid gets 3 LV Channels (-5. 5 V, 5. 5 V and 6 V) LV Devices – CAEN: q q Crate: SY 2527 with a Branch. Controller (A 1676 A) esay. Carte: ESAY 3000 with five A 3009 Boards (12 channels) plugged in 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 14

LV – VELO Project n Main Panel: FSM Hierarchy q n Velo_A Hybrid Panel: q n Control the state, the voltage of all the hybrids Velo_C Control the state, the voltage of its three channels Hyb 1 Hyb 2 Hyb N Channel 1 Channel 2 Channel 3 Channel Panel: q 24. 07. 2006 Control the state, the voltage Cédric Potterat - LPHE Monday Meeting 15

LV – FSM State: very basic ERROR Recover An error Switch_ON n RAMPING_UP OFF READY Channel RAMPING_DOWN 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting Switch_OFF 16

LV – VELO Project n This PVSS project: q q q developed with a simulator successfully tested with real hardware waiting for new information about the power supplies that will be used 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 17

TELL 1 – PVSS Project n We are attending to a crucial point in Switzerland History and Symbol 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 18

TELL 1 – PVSS – Outlines n We focus on the description (DPT, Panels) of a Ve. Lo Tell 1. (Ve. Lo TELL 1 is now completely described (registers, settings, addresses)) n n The access to the configuration database and recipe definition interface is finished We put hands on the FSM (Rules, Panels) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 19

TELL 1 – PVSS Project Power Optical Receiver ECS Interface PPFPGAs TTC IF Optical Receiver 24. 07. 2006 Sync Link. FPGA Cédric Potterat - LPHE Monday Meeting GBE 20

TELL 1 – PVSS Tools n DIM n fw. Dim (C. Gaspar) n http: //dim. web. cern. ch/dim/ n ccserv (S. Koestner) fw. Ccpc (S. Koestner - R. Fernandes) n http: //lhcb-online. web. cern. ch/lhcb-online/ecs/PVSS_CCPC/default. html n n fw. Hw (R. Fernandes) n 24. 07. 2006 http: //lhcb-online. web. cern. ch/lhcb-online/ecs/FWHW/default. html Cédric Potterat - LPHE Monday Meeting 21

DIM q Publish/Subscribe mechanism n n Servers publish Services. Clients subscribe to Services: q n q On change or at regular intervals Clients can send commands to Servers Services n A set of data q q q Distributed Information Management System any type or size Identified by a name A Name Server n Keeps a list of available Services 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 22

DIM q q Transparency n DIM clients do not know where their interlocutors are. n DIM components can move from one machine to another, all connections are transparently re-established. Available on mixed environments: n UNIX (HP-UX, Sun-OS, Sun-Solaris, IBM-AIX, DEC-OSF, Linux), Windows, VMS, Real-time OSs (OS 9, Lynx. OS, Vx. Works) q q Some Characteristics API available in “C”, C++ and Java Easy to Use n One “call” and a process can become a server or a client. n Monitoring and Visualization Tools Available. n Documentation and examples at: http: //www. cern. ch/dim 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 23

PVSS DIM n Fw. DIM component: q q q Server is a DIM Server Client is a PVSS Manager (PVSS 00 dim) Correspondence: PVSS DPs DIM Services n n q When setup n n q Can be setup graphically via fw. DIM panel Or via a script library When Server updates Service data goes into DP Writing to DP will send a DIM Command Documentation at: n 24. 07. 2006 http: //www. cern. ch/lhcb-online/ecs/fw/Fw. Dim. html Cédric Potterat - LPHE Monday Meeting 24

CCPC – PVSS Interface: the server (S. Koestner) - Ccpc server: A generic DIM server (ccserv) running in a credit-card PC, which allows access to all features of the CCPC/glue card including access to any chips over I 2 C, JTAG and parallel bus. Server is built on various software layers with the aim to hide as much as possible hardware complexity. (e. g. no need for users to read the docs of Tell 1 components) Server runs on embedded PC (i 486 compatible, 133 MHz). Access to 3 bus-types via Plx/PCI bridge to gluecard: - parallel bus (8/16/32 bits) - I 2 C bus (4 distinct lines) - JTAG (3 chains) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 25

CCPC – PVSS Interface: the Client n fw. Ccpc provides: q q q Dim client (PVSS 00 dim) control panels which can access every CCPC connected to the same Name Server (DIM_DNS_NODE) Functions for reading, writing the registers of each type (I 2 C, LBUS, …) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 26

fw. Hw (R. Ferrandes) All the TELL 1 components are described as a type And TELL 1 is build up with all these components 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 27

fw. Hw TELL 1 address TELL 1 components structure To subscribe all the registers of the selected component to the server Registers Register’s settings 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 28

fw. Hw n Scripts can be executed All the TELL 1 board is now described in PVSS as a DPT, and complete TELL 1’s can be created as DP (correct name, addresses…) according to the “ECS Interface n Library User Guide” (H. Gong, A. Gong, H. Lei and G. Haefeli) (S. Koestner & C. Potterat) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 29

TELL 1 – Setup lphe 1 pc 7 (windows) TCP/IP lphe 1 pc 60 (linux) ~ 1000 (writings/readings) 24. 07. 2006 lphe 1 tell 7 Client Server (ccserv) >% dns & ~ 500 (commands) Name Server (DIM_DNS_NODE = lphe 1 pc 60) Cédric Potterat - LPHE Monday Meeting 30

TELL 1 – PVSS n Goals: q q Create FSM to control all the TELL 1’s (Rules, Panels) (S. Koestner) Create Panels which can replace the “console_tell 1 ”, which will be called from the FSM panels (C. Potterat) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 31

FSM - State Diagram DAQ Domains: ERROR Recover NOT_READY Configure UNKNOWN Reset READY Start Stop RUNNING The possible states of the Tell 1: From NOT_READY to READY the configuration of the Tell 1 is done a compilation of applying recipes, pulling trigger lines and hardcoded sequences on the server side, which is the main job. The transition from Ready to Running is less massive (e. g. enabling triggers). UNKNOWN appears if ECS control is lost (e. g. server crashes) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 32

TELL 1 – FSM 1 st and basic FSM Panel to be used for the 1 st test (in development) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 33

console_tell 1 The Actual Rates 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 34

console_tell 1 The Event Monitor Counters 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 35

console_tell 1 The Pedestals 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 36

console_tell 1 The Linear Common Mode Suppression's (LCMS) Average and Slope 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 37

console_tell 1 The last 128 MEP in the MEP buffer, and all the information attached to. 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 38

console_tell 1 Global information about the TELL 1, the server (ccserv) and PVSS components 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 39

Outlook n Continue to create panels to control or monitor the TELL 1’s registers q q n PP and Sync. Link FPGA (C. Potterat) GBE, TTCRx and FEM (S. Koestner) Update the DP according to the latest ECS doc (C. Potterat) n Provide a fw. TELL 1 component including the FSM, the ccpc client and all the current panels http: //lhcb-online. web. cern. ch/lhcb-online/ecs/PVSS_TELL 1/default. html (all the current versions and tutorials about fw. Ccpc, fw. Hw and TELL 1’s FSM are available on this web page) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 40

24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 41

Back up 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 42

CCPC Client : how it works 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 43

PVSS Client (LBUS): Choose ccpc from the list of running servers Choose type (width) of local bus 32, 16, 8 bits Determines number of words (e. g. 4 bytes for 32 bit bus) to be read or written. ‘Data in’ (to be written) must have the exact size. Masked write operation can be defined (e. g. reset registers on fpga). leave empty if not required Indicates success of operation 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 44

PVSS Client (GBE): Gigabit Ethernet card accessed over a 16 bit bus. MAC registers however 32 bits. Interface to be used as if it were a 32 bit bus. (1 word = 4 bytes) The addresses to be given in the address field correspond to the addresses given in the Intel MAC data sheet (same functionalities as LBUS) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 45

PVSS Client (I 2 C): Some hardware can just be written in pages (e. g. EEPROMs on Tell 1 with a pagesize of 16 bytes) This will be respected on the server side. Leave empty if no pagesize is required. Combined: Subaddress and data is written in one go (usual). Separated: Subaddress is written first to pointer register. (it is the one you have to provide in the address field) Shift register: One byte has to be specified. This is shifted then by the server. (periodic pattern) 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 46

PVSS Client (JTAG): Select JTAG chain Number of bits to be shifted Data is shifted with the least significant bits first. Missing MSBs are replaced by zeros. Data must be a multiple of 2 to represent byte stream. Indicates the state of the state machine. 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 47

PVSS Client (GPIO): Interface to the 9 GPIO lines should be used just by experts only! (click and try could harm hardware) Declaring and enabling GPIO lines Apply value to GPIO lines (high, low) Get current status of GPIO lines 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 48

PVSS Client (Command): Emulates a shell on the Ccpc: Commandline tools of the ccpc can be launched to crosscheck the results obtained from the server. Everlasting commands like ‘ping’ are timed out after 10 seconds. Does not follow change of directories. 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 49

PVSS Client (Advanced): CONTROL scripts using the PVSS or framework libraries can be edited and executed directly. 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 50

PVSS Client (Advanced): Downloads firmware to EPC 16 (pof and jam is provided) Actions for jam can be propagated. Loads FPGAs directly from EPC 16 Content of the registers and memory blocks is written from the. cfg file to the FPGAs PS: Jumper can be set such that FPGAs can be programmed directly without EPC 16! 24. 07. 2006 Cédric Potterat - LPHE Monday Meeting 51