CSCM Test description and Risk assessment Arjan Verweij

CSCM Test description and Risk assessment Arjan Verweij, on behalf of the CSCM team Ø Goal Ø The typical and ultimate current cycle Ø Test sequence for type test and regular test Ø Risk assessment Ø Strategy & planning for CSCM tests during LS 1 Ø Conclusion Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

main circuits (RB, RQD/F) up to nominal current (7 Te. V equivalent) at 20 K. The bus & bypass comprises: Current leads + Pigtails + Busbars + Diode leads + Diodes + all soldered/welded/brazed/bolted connections in-between. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Goal of the test CSCM main goal: qualification of the bus & bypass of the

Average numbers for each circuit RB RQ Nr of current leads per circuit 4 2 Nr of connections between lead and pigtail 4 2 Nr of connections between pigtail and busbar 4 2 Nr of busbar joints 420 Nr of T-connections 308 98 Nr of diode leads 308 98 Nr of ‘half moon’ connections 308 - - 196 Nr of connections between bus and heat sink 308 98 Nr of connections between heat sink and diode 308 98 Nr of diodes 154 49 Nr of connections between bus and connection plate Goal of the test Nr of circuits: 8 x RB, 8 x RQD, 8 x RQF The CSCM can qualify all these components in a few current cycles, and can also detect high resistive parts/contacts, which can then be repaired or monitored in time. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Qualification should correspond in terms of heat deposition to an exponential decay from 12 k. A with t=100 s (RB) or t=30 s (RQ)*. Ø Qualification should go to similar currents as the LHC because some contact resistances seem strongly current dependent. RB RQ Current (k. A) t (s) MIIt’s (106 A 2 s) Qdiode (k. J) 8. 4 68 2400 600 12 100 7200 1260 13 100 8450 1365 8. 4 15 530 132 12 30 * 2160 378 13 30 * 2535 410 • although we might be able to use t=15 -22 s for the RQ circuits, I will assume t=30 s as the most conservative value. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Goal of the test Ø

Simulation parameters: THe=20 K RRRbus=200 Vdiode=2. 2 V @ 20 K, 1 V @ 60 K or above (To be checked in SM 18) With & without cooling to GHe Rdiode-lead=10 m. W (RB)-15 m. W (RQ) LRB=LRQ=3. 5 m. H (so stored energy is 250 k. J at 12 k. A) Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Goal of the test Simulations have been performed to see what type of current cycle (plateau, linear ramp down, exp. ramp down, …) would be optimum to reach the required current and MIIt’s, taking into account constraints from the power converter and QPS.

Typical current cycle Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Typical current cycle 1) 2) 3) 4) 5) 6) Increase voltage of the converter with 20 V/s up to 500 A Plateau of 10 s Increase the current linearly from 500 A to Itest in 12 s Plateau of 2 -100 s Ramp the current exponentially down to 1000 A Ramp the current linearly down to 0 A 4 3 5 2 1 6 Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

1 Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Typical current cycle Step 1: Ramp up to 500 A with 20 V/s to open all the diodes. § This step is scheduled to take 20 s. § The dipole diodes will start to conduct at about 50 A (using RRR=150, RMB, 20 K= 42 m. W). § The quad diodes will start to conduct at about 365 A (using RRR=150, RMQ, 20 K= 6 m. W). § During the rest of the measurement run, the current in dipoles and quads will be about 24 A and 165 A respectively, resulting in a power of 24 W and 165 W.

Step 3: Ramp up to test current with up to 1000 A/s § This step is scheduled to take 12 s. § Typical maximum inductive voltages during this step are: - 30 m dipole segment: Uind=20 m. H x 1000 A/s = 20 m. V - 100 m quad segment: Uind=60 m. H x 1000 A/s = 60 m. V 3 2 Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Typical current cycle Step 2: Check if the diodes are open and prepare for ramp § This step is scheduled to take 10 s.

Step 5: Ramp down to 1000 A § The ramp down is exponential, with time constants of about 90 s (RB) and 20 s (RQ), see later. § This step is scheduled to take maximum 220 s. § If needed, some tests can be added with a linear ramp down. Step 6: Ramp down from 1000 A to 0 A with -100 A/s § This step is scheduled to take 10 s. 4 5 6 Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Typical current cycle Step 4: Plateau at the test current § Depending on the test, this step is scheduled to take between 2 and 100 s.

The ultimate current cycle Using h=5 W/K/m 2 for insulated bus and h=20 W/K/m 2 for non-insulated bus. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Hugues will discuss if the converters can power the circuits in this way. Bernardo will discuss if the current leads can operate with Tbottom up to 80 K. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Ultimate current cycle RB (Voltage and power for one sector)

D(d. V/dt)≈25 m. V/s DV≈1 V Jens will show the QPS works with these strongly varying V and d. V/dt Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Ultimate current cycle RB (V and d. V/dt for one segment of 38 m)

=280 MJ =130 MJ Krzysztof/Serge will show the expected cryogenic behaviour Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Ultimate current cycle RB (power for one sector)

Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Ultimate current cycle RQ (Voltage and power for one sector)

Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Ultimate current cycle RQ (V and d. V/dt for one segment of 115 m)

=60 MJ =50 MJ Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Ultimate current cycle RQ (power for one sector)

Opening of the diodes (without tripping the converter). Protection with a strongly changing ‘background’ V and d. V/dt. Possible ‘sunglasses’ at the start of the test. Protection of the HTS part of the current lead. Powering, especially the 60 s with I>6. 5 k. A. Cryogenic regulation of arc and DFB, and helium pressure. Heat transfer between bus/diode and GHe. Fast data acquisition and analysis Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Ultimate current cycle Main (technical) issues:

Test sequence for the type test Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Ø The first tests will be carried out with small currents in order to: § § § Check if the diodes conduct, and measure the forward voltage. § § § Check the correct functioning of the QPS. Measure the inductance of the circuit. Measure the resistance of the busbar segments and the diode leads. Very high resistances can already be detected. Check a QPS trigger on the V threshold. Check a QPS trigger on the d. V/dt threshold. Ø Quench thresholds will be set to low values for the first runs and will be increased during the test campaign. Ø All measurement runs will be compared to simulations, and a next run will only be started once all signals are understood. Ø Histograms during the analysis will help us to identify the outliers. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Test sequence for the type test Ø A series of measurement runs at increasing current and MIIt’s is foreseen to avoid as much as possible a very fast thermal runaway.

Test sequence for the RB type test Assuming adiabatic conditions d. I/dtup (A/s) I (k. A) ttop (s) Decay MIIt’s (106 A 2 s) V (m. V) (d. V/dt) (m. V/s) Tbus, max (K) Q (MJ) 1 a 42 1 40 Exp, t=88 s 54 14 -0. 15/0. 01 21 12 2 a 125 2 40 Exp, t=88 s 319 15/29 -0. 28/0. 04 23 33 3 a 292 4 20 Exp, t=88 s 1060 21/65 -0. 40/0. 41 29 64 3 b 292 4 70 Exp, t=88 s 1860 31/92 -0. 57/0. 64 35 98 4 a 458 6 24 Exp, t=88 s 2570 44/133 -0. 79/2. 0 39 111 4 b 458 6 46 Exp, t=88 s 3360 64/194 -1. 15/3. 0 45 138 4 c 458 6 70 Exp, t=88 s 4220 90/295 -1. 8/4. 7 52 170 4 d 458 6 94 Exp, t=88 s 5090 90/450 -2. 7/7. 2 60 209 5 a 625 8 42 Exp, t=88 s 5740 128/623 -3. 7/13 67 221 5 b 625 8 54 Exp, t=88 s 6510 128/894 -5. 4/19 77 265 6 a 958 12 2 Exp, t=88 s 7190 225/1227 -7. 4/19 87 296 Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Ø If, during the type test, the equivalent MIIt’s cannot be reached, then an ‘as-good-as-possible’ qualification run will be performed going to the same current but for a shorter time or a smaller t. This gives at least the possibility to assess the contact resistances in the diode leads. Ø The test sequence of the RQ will be similar with about 15 runs with MIIt’s increasing up to 2160 106 A 2 s. Ø The test sequence of the CSCM after LS 1 will be based on the results of the type test. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Test sequence for the type test Ø Other runs will probably be added during the campaign, based on test results & analysis.

Risk assessment Ø Risk of the CSCM type test Ø Risk of the CSCM after LS 1. Ø Risk of not doing the CSCM Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Ø The power converter does not follow the requested current cycle. Ø The QPS does not work properly. 2 Problems that could occur at higher currents, but can probably be avoided/limited by the staged increase in MIIt’s per test run. Ø Equipment (converter, diode, lead, …) gets damaged due to overvoltage, overpressure, high temperature, helium flow, … 3 Problems that cannot be completely avoided. Ø The QPS does not detect the voltage run-away (also note that the diode lead protection has no redundancy). Ø The voltage runaway is too fast to avoid a burn-out. Ø One of the (bolted) connections suddenly (partially) opens. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Risk of the type test 1 Problems that could happen at the first test cycles but will be solved before performing tests at higher current

RB RQ d. I/dt [k. A/s] -60 to -50 -57 to -19 t [s] 0. 22 0. 35 Qarc [k. J] 25 34 As compared to the 2008 accident the energy dissipation in the arc is roughly 10000 x smaller. Theoretically it takes 5 k. J to melt 1 cm 3 of copper. So 25 k. J can melt 1. 6 cm of RB bus, and 34 k. J can melt 3. 4 cm of RQ bus. It is therefore almost sure that an arc in the RB or RQ circuit will cause damage which is only limited to the bus itself, and will not make a hole in the M-line, or damage other equipment. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Risk of the type test In case of a local burn-through of a busbar joint at full current, an arc will occur, and the current will decay semi-linearly.

RB RQ d. I/dt [k. A/s] -194 to -44 -140 to -13 t [s] 0. 12 0. 22 MIIt’s [106 A 2 s] 3. 8 7. 6 The MIIt’s needed for detection and switch-off of the converter have to be added (about 3 MA 2 s for 20 ms). The energy dissipated in the cable of the magnet is relatively small and will not cause the cable to burn through. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Risk of the type test In case of a local burn-through of a diode lead at full current, the current will be forced in the normal conducting magnet, and decay semi-exponentially.

Risk of a CSCM test after LS 1 The type test will (hopefully) have resolved all possible risks related to the hardware. Voltages will always remain below 400 V. The consolidation during LS 1 will have resolved all the defective 13 k. A joints and strengthened the contacts at the connection plates of the quad diodes. The QPS should therefore never trigger except if there is still a weak spot in the circuit. F such a weak point is detected too late it could possibly cause a burn-through of the circuit and arcing, but the consequences will be small. Anyhow, it will be much better to see the defect during the CSCM then during operation… Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

I will focus therefore on defects in the diode leads which have to conduct the current in case of magnet quenches. I will use the following estimates (for the entire machine): Number of training quenches to reach 6. 5 Te. V (11 k. A) RB Number of training quenches to reach 7 Te. V (11. 85 k. A) 40 800 Number of MB quenches during normal operation at I>10 k. A 4/year Number of training quenches to reach 6. 5 Te. V (10. 4 k. A) 4 RQ Number of training quenches to reach 7 Te. V (11. 2 k. A) Number of MQ quenches during normal operation at I>10 k. A 16 2/year PS: I neglect all quenches at I<10 k. A (which includes also almost all the secondary MB quenches) Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Risk of not doing the CSCM test The probability of having defective 13 k. A joints after LS 1 is negligible.

Probability of a defective MB diode lead: 0. 01% Probability of a defective MQ diode lead: 0. 01% Probability for overheating RB RQ training to 6. 5 Te. V 1% (40 * 2 * 0. 01%) training to 7 Te. V 15% (1 - (99. 98/100)800) normal operation 0. 1%/year (4 * 2 * 0. 01%) training to 6. 5 Te. V 0. 2% (4 * 2 * 0. 01%) training to 7 Te. V 0. 6% (16 * 2* 0. 01%) normal operation 0. 1%/year (2 * 2* 0. 01%) Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Risk of not doing the CSCM test The diode leads have never been tested at high current and it cannot be guaranteed that all diode leads can handle a 12 k. A discharge without overheating. As an example I will assume:

Risk assessment: Conclusion Probability for circuit opening (P) Consequences (C) CSCM type test Not negligible Very small Risk of the CSCM test after consolidation The probability for damage (P 2) should be very small. CSCM test after Small The consequences (C 2) are. Very small and might lead to some delay of LS 1. consolidation Risk=Px. C 0 Operation without doing CSCM Very small Very large Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Risk =P*C 0 0 >0

Test successful ? No Possible CSCM test strategy CSCM type test in one sector at the start of LS 1 Stop tests Yes Warm-up, repair, cool-down CSCM in the first 6 consolidated sectors Yes Defects found? No Warm-up, repair, cool -down CSCM in remaining 2 sectors Yes Run up to safe energy Defects found? Run LHC at <6. 5 Te. V CSCM in remaining 2 sectors later No Run up to 7 Te. V No Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012 Defects found? Warm-up, repair, cool-down Yes

From M. Bernardini Planning CSCM type test Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Planning CSCM in 6 sectors after consolidation From M. Bernardini CONSTRAINT: powering tests have to be performed in 3 sectors in parallel Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Conclusion 1/2 q The CSCM is a powerful tool to qualify the bus and bypass part of the main circuits, especially the diode leads which have never been tested at high currents. q A CSCM type test at the beginning of LS 1 is necessary as a proof-ofprinciple. The risk of such a test is very small, mainly due to a staged approach of the test campaign, with slowly increasing MIIt’s per test. q To validate the type test, runs have to be performed up to at least 10 k. A, but preferably up to 12 k. A. At least 2 thermal runaways should be planned in order to test the proper functioning of the QPS. q The decision to do the CSCM after LS 1 should be made directly after the type test, and requires more resources. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012

Conclusion 2/2 q The risk associated with a CSCM after LS 1 is very small, and mainly limited to sudden increases in contact resistances. After consolidation such weak points should of course not anymore be present, and if they are still present it is better to find them with the CSCM than during operation. q If the SM 18 tests show that the HTS leads cannot be safely run with 20 -80 K at the bottom, then the CSCM can still be done while trying to keep the DFB’s cold (<9 K). After consolidation of the joints, the main purpose of the test is the diode leads so having a superconducting bus close to the DFB’s is not a problem. q If successful and useful, one could envisage to perform the CSCM test on a more regular base in the coming 20 years. Arjan Verweij, TE-MPE, CSCM review 14 Nov 2012