Sequential logic circuits Outline Sequential Circuit Models Asynchronous

Sequential logic circuits

Outline • Sequential Circuit Models – Asynchronous – Synchronous • Latches • Flip-Flops CS 3402 --Digital Logic Sequential logic circuits 2

Sequential logic circuits • The main characteristic of combinational logic circuits is that their output values depend on their present input values. • Sequential logic circuits differ from combinational logic circuits because they contain memory elements so that their output values depend on both present and past input values CS 3402 --Digital Logic Sequential logic circuits 3

Sequential logic circuits Sequential circuits can be Asynchronous or synchronous. Asynchronous sequential circuits change their states and output values whenever a change in input values occurs. Synchronous sequential circuits change their states and output values at fixed points of time, i. e. clock signals. CS 3402 --Digital Logic Sequential logic circuits 4

Sequential Circuit Models Universal model CS 3402 --Digital Logic Sequential logic circuits 5

Combinational circuit model Mealy machine model Moore machine model CS 3402 --Digital Logic Sequential logic circuits 6

Memory Devices Latches A latch is a memory element whose excitation signals control the state of the device. A latch has two stages set and reset. Set stage sets the output to 1. Reset stage set the output to 0. Flip-flops A flip-flop is a memory device that has clock signals control the state of the device. CS 3402 --Digital Logic Sequential logic circuits 7

Latch CS 3402 --Digital Logic Flip-flop Sequential logic circuits 8

Inverter Chains Ring oscillator CS 3402 --Digital Logic Sequential logic circuits 9

Latches RS Latch The RS latch is the basic memory element consists of two cross-coupled NOR gates. It has two input signals, S set signal and R reset signal. It also has two outputs Q and Q'; and two states, a set state when Q = 1 and a reset state when Q = 0 (Q' = 1) CS 3402 --Digital Logic Sequential logic circuits 10

S R Q Q' S R 1 0 0 0 hold 0 0 1 0 reset 0 1 1 0 1 set 0 0 0 1 1 1 unstable 1 1 0 0 CS 3402 --Digital Logic Sequential logic circuits Q 11

S R Q Q' S R 1 0 0 0 unstable 1 1 1 0 0 1 0 reset 0 1 1 0 1 set 1 1 0 1 1 1 hold 0 0 1 1 CS 3402 --Digital Logic Sequential logic circuits Q 12

Flip-Flops A flip-flop is a level-sensitive latch with a clock input. RS flip-flop Q+ = S +R'Q CS 3402 --Digital Logic Sequential logic circuits 13

T (Toggle) flip-flop D Q(t) Q(t+1) 0 0 1 1 1 0 Hold Toggle Q+ = TQ' + T'Q CS 3402 --Digital Logic Sequential logic circuits 14

Master Slave Flip-Flops A master slave flip-flop consists of two latches and an inverter. Master-slave RS flip-flop CS 3402 --Digital Logic Sequential logic circuits 15

Master-Slave JK Flip-Flops CS 3402 --Digital Logic Sequential logic circuits 16