Semiconductor Device Physics Lecture 8 Dr Ing Erwin

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Semiconductor Device Physics Lecture 8 Dr. -Ing. Erwin Sitompul President University http: //zitompul. wordpress.

Semiconductor Device Physics Lecture 8 Dr. -Ing. Erwin Sitompul President University http: //zitompul. wordpress. com President University Erwin Sitompul SDP 8/1

Chapter 6 pn Junction Diodes: I-V Characteristics Minority-Carrier Charge Storage n When VA>0, excess

Chapter 6 pn Junction Diodes: I-V Characteristics Minority-Carrier Charge Storage n When VA>0, excess minority carriers are stored in the quasineutral regions of a pn junction. President University Erwin Sitompul SDP 8/2

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n Consider a forward-biased

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n Consider a forward-biased pn junction. n The total excess hole charge in the n quasineutral region is: n Since the electric field E» 0, n Therefore (after all terms multiplied by q), n The minority carrier diffusion equation is (without GL): President University Erwin Sitompul SDP 8/3

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n Integrating over the

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n Integrating over the n quasineutral region (after all terms multiplied by Adx), QP QP n Furthermore, in a p+n junction, 0 n So: In steady state President University Erwin Sitompul SDP 8/4

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n We can calculate

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n We can calculate pn junction current in two ways: n From slopes of Δnp(–xp) and Δpn(xn) n From steady-state charges QN and QP stored in each “excess minority charge distribution” n Therefore n Similarly President University Erwin Sitompul SDP 8/5

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n Moreover, in a

Chapter 6 pn Junction Diodes: I-V Characteristics Charge Control Approach n Moreover, in a p+n junction: In steady state President University Erwin Sitompul SDP 8/6

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode n Narrow-base diode: a diode

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode n Narrow-base diode: a diode where the width of the quasineutral region on the lightly doped side of the junction is on the order of or less than one diffusion length. n-side contact President University Erwin Sitompul SDP 8/7

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n We have the

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n We have the following boundary conditions: n Then, the solution is of the form: n Applying the boundary conditions, we have: President University Erwin Sitompul SDP 8/8

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n Solving for A

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n Solving for A 1 and A 2, and substituting back: n Note that n The solution can be written more compactly as President University Erwin Sitompul SDP 8/9

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n With decrease base

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n With decrease base width, xc’ 0: • Δpn is a linear function of x due to • negligible thermal R–G in region much shorter than one diffusion length Jp is constant • This approximation can be derived using Taylor series approximation President University Erwin Sitompul SDP 8/10

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n Because , then

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n Because , then n Then, for a p+n junction: President University Erwin Sitompul SDP 8/11

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n If xc’ <<

Chapter 6 pn Junction Diodes: I-V Characteristics Narrow-Base Diode I–V n If xc’ << LP, n Resulting Increase of reverse bias means • Increase of reverse current • Increase of depletion width • Decrease of quasineutral region xc’=xc–xn President University Erwin Sitompul SDP 8/12

Chapter 6 pn Junction Diodes: I-V Characteristics Wide-Base Diode n Rewriting the general solution

Chapter 6 pn Junction Diodes: I-V Characteristics Wide-Base Diode n Rewriting the general solution for carrier excess, n For the case of wide-base diode (xc’ >> LP), Back to ideal diode solution President University Erwin Sitompul SDP 8/13

Chapter 6 pn Junction Diodes: I-V Characteristics Wide-Base Diode n Rewriting the general solution

Chapter 6 pn Junction Diodes: I-V Characteristics Wide-Base Diode n Rewriting the general solution for diffusion current, n For the case of wide-base diode (xc’ >> LP), Back to ideal diode solution President University Erwin Sitompul SDP 8/14

Chapter 7 pn Junction Diodes: Small-Signal Admittance Small-Signal Diode Biasing n When reversed-biased, a

Chapter 7 pn Junction Diodes: Small-Signal Admittance Small-Signal Diode Biasing n When reversed-biased, a pn junction diode becomes functionally equivalent to a capacitor, whose capacitance decreases as the reverse bias increases. n Biasing additional a. c. signal va can be viewed as a small oscillation of the depletion width about the steady state value. RS C G V 0 << VA President University Erwin Sitompul : serial resistance : capacitance : conductance SDP 8/15

Chapter 7 pn Junction Diodes: Small-Signal Admittance Total pn Junction Capacitance Minority carrier lifetime

Chapter 7 pn Junction Diodes: Small-Signal Admittance Total pn Junction Capacitance Minority carrier lifetime Junction / depletion capacitance due to variation of depletion charges Diffusion capacitance due to variation of stored minority charges in the quasineutral regions • CJ dominates at low forward biases, reverse biases • CD dominates at moderate to high forward biases President University Erwin Sitompul SDP 8/16

Chapter 7 pn Junction Diodes: Small-Signal Admittance Relation Between CJ and VA n For

Chapter 7 pn Junction Diodes: Small-Signal Admittance Relation Between CJ and VA n For asymmetrical step junction, NB : bulk semiconductor doping, NA or ND as appropriate n Therefore President University Erwin Sitompul SDP 8/17

Chapter 8 pn Junction Diodes: Transient Response Turn-Off Transient n In order to turn

Chapter 8 pn Junction Diodes: Transient Response Turn-Off Transient n In order to turn the diode off, the excess minority carriers must be removed through net carrier flow out of the quasineutral regions and recombination. n Carrier flow is limited by the switching circuit tr : recovery time ts : storage delay time trr : reverse recovery time Diode switching circuit President University Erwin Sitompul SDP 8/18

Chapter 8 pn Junction Diodes: Transient Response Turn-Off Transient n Voltage-time transient The junction

Chapter 8 pn Junction Diodes: Transient Response Turn-Off Transient n Voltage-time transient The junction remains forward biased for 0 < ts v. A(t) = 0 at t = ts President University Erwin Sitompul SDP 8/19

Chapter 8 pn Junction Diodes: Transient Response of pn Diode n Suppose a pn

Chapter 8 pn Junction Diodes: Transient Response of pn Diode n Suppose a pn diode is forward biased, then suddenly turned off at time t = 0. n Because of CD, the voltage across the pn junction depletion region cannot be changed instantaneously n The delay in switching between the ON and OFF states is due to the time required to change the amount of excess minority carriers stored in the quasi-neutral regions. President University Erwin Sitompul SDP 8/20

Chapter 8 pn Junction Diodes: Transient Response Decay of Stored Charge n Consider a

Chapter 8 pn Junction Diodes: Transient Response Decay of Stored Charge n Consider a p+n diode: Dpn(x) i(t) Decrease due to recombination and reverse current flow ts t v. A(t) pn 0 x xn ts n For t > 0: President University t • The diode remains forward biased during 0 < ts Erwin Sitompul SDP 8/21

Chapter 8 pn Junction Diodes: Transient Response Examples i-t transient Increase IF Decrease tp

Chapter 8 pn Junction Diodes: Transient Response Examples i-t transient Increase IF Decrease tp Increase IR i(t) ts t President University ts t Erwin Sitompul t SDP 8/22

Chapter 8 pn Junction Diodes: Transient Response Storage Delay Time ts n ts is

Chapter 8 pn Junction Diodes: Transient Response Storage Delay Time ts n ts is the primary quantity used to characterize the transient response of pn junction diodes QP : excess hole charge n By separation of variables and integration from t = 0+ to t = ts, noting that n And making the approximation of n We may conclude that President University Erwin Sitompul SDP 8/23

Chapter 8 pn Junction Diodes: Transient Response Turn-On Transient n Again, consider a p+n

Chapter 8 pn Junction Diodes: Transient Response Turn-On Transient n Again, consider a p+n diode: Dpn(x) i(t) A positive current IF is forced to flow through the diode beginning at t = 0 t v. A(t) pn 0 xn x n For t > 0: President University t Erwin Sitompul SDP 8/24

Chapter 8 pn Junction Diodes: Transient Response Turn-On Transient n Rewriting for turn-on characteristics,

Chapter 8 pn Junction Diodes: Transient Response Turn-On Transient n Rewriting for turn-on characteristics, n By separation of variables and integration, we have n If we assume that the build-up of stored charge occurs quasistatically so that Steady state n Finally President University Erwin Sitompul SDP 8/25

Chapter 6 pn Junction Diodes: I-V Characteristics Homework 6 n 1. (8. 14) n

Chapter 6 pn Junction Diodes: I-V Characteristics Homework 6 n 1. (8. 14) n 2. (7. 2) The cross-sectional area of a silicon pn junction is 10– 3 cm 2. The temperature of the diode is 300 K, and the doping concentrations are ND = 1016 cm– 3 and NA = 8× 1015 cm– 3. Assume minority carrier lifetimes of τn 0 = 10– 6 s and τp 0 = 10– 7 s. Calculate the total number of excess electrons in the p region and the total number of excess holes in the n region for (a) VA = 0. 3 V, (b) VA = 0. 4 V, and (c) VA = 0. 5 V. Problem 8. 2, Pierret’s “Semiconductor Device Fundamentals”. n Deadline: 31. 03. 2011, at 07: 30 am. President University Erwin Sitompul SDP 8/26