News from the Ramps ·Status of delay ramps: · runs were taken for DAC=20 k at gain x 1 DAC= 5 k at gain x 8 · all different ticks look like tick=0 ÞCheck tick setting again ÞT&C code? pulse height increasing pulser delay -3 3/6/2021 0 +3 time +6 sampling time with respect to trigger 1
Delay unit for max ADC count ·value determined by simple check on ADC max ·variation between 5 -25 Þ results as functio of Pamp types Þ fit procedure for interpolation 3/6/2021 3
Delay Ramp: gain 1 -gain 8 ·similar behavior, verification of delays for ADCmax 3/6/2021 4
New: Linearity Ramps! Delay=0 · “DAC” ramp for BLS-subt. at – 3 and – 5: difference visible 3/6/2021 5
for linearity ramp gain 1 · ’s are worse for BLS-sub at – 5 · increase at high DAC values 3/6/2021 6
ADCmeas-ADCfit/ADCmax gain 1 fit between DAC=0 and 60 k DAC > 60 k saturation effects from pulser 3/6/2021 7
Fit Parameters gain 1 BLS sub – 5 ticks ·offset < pedestal ·slope ~ 0. 24 BLS sub – 3 ticks 3/6/2021 8
Linearity Ramps gain 8 Delay=0 · essentialy same behavior than for gain 1 3/6/2021 9
for linearity ramp gain 8 · ’s are worse for BLS-sub at -5 3/6/2021 10
ADCmeas-ADCfit/ADCmax gain 8 fit between DAC=0 and 10 k twiggle at DAC= 8 -9 k 3/6/2021 11
Fit Parameters gain 8 BLS sub – 5 ticks ·offset < pedestal ·slope ~ 0. 24 BLS sub – 3 ticks 3/6/2021 12
Next steps: · files have been produced for 384 channels (1 ADC card) Þ check for uniformities · determine delay for maximal response from fit · verify ’s for linearities · detailed dac-ramp up · variations as function of Pamp type… 3/6/2021 13