Mars Atmosphere and Volatile Evolutio N MAVEN Mission

Mars Atmosphere and Volatile Evolutio. N (MAVEN) Mission Particles and Fields Package Pre-Environmental Review May 22 -23, 2012 17 - PFDPU D. Gordon / W. Donakowski PFDPU Team MAVEN IPER May 22 -23, 2012 17 -1

Introduction Topic/Content Presenter Allocated Time Duration Overview/Block Diagram D. Gordon 0: 05 Electrical (Status/Test Results) D. Gordon 0: 10 Mechanical (Status/Test Results) W. Donakowski 0: 10 Vibration W. Donakowski 0: 05 Thermal Vac D. Gordon 0: 05 Wrapup /Questions D. Gordon 0: 05 MAVEN IPER May 22 -23, 2012 17 -2

Overview Electrical Components covered in this presentation: • DCB • REG • IIB Remaining PFDPU resident boards are covered by the Instrument specific presentations. Mechanical presentation covers the entire PFDPU Vibration and Thermal Vacuum Procedures performed on the entire PFDPU MAVEN IPER May 22 -23, 2012 17 -3

PFDPU Hardware Team • • • DCB (Processor) – Dorothy Gordon REG (Power Supplies, Switches and Actuator Control) – Peter Berg and Dennis Seitz IIB (Instrument Power Regulators and Signal Distribution) – Chris Tiu Mechanical – William Donakowski QA and Manufacturing – Jorg Fischer – Chris Scholz – William Whitehead (visiting, R&QA) – Mike Raffanti PFDPU Resident Instrument Boards – SEP/DAP Team (SSL) – DFB/BEB Team (LASP) – MAG Team (GSFC) MAVEN IPER May 22 -23, 2012 17 -4

Electrical Block Diagram IIB not shown, sits between LVPS(REG)/DCB and the Instruments MAVEN IPER May 22 -23, 2012 REG 1 REG 2 DCB 1 DCB 2 17 -5

Relevant Documentation • • • • • MAVEN_PF_SYS_004 – PFDPU to Instruments ICD MAVEN_PF_SYS_003 – Power Converter Requirements MAVEN_PF_PFDPU_001 – Data Controller Board Specification MAVEN_PF_SYS_021_Power. Distribution MAVEN_PF_SYS_014_Grounding MAVEN_PF_SYS_013 – Harnessing Drawing MAVEN_PF_SYS_016 – Connector Pinouts MAV-IDP-MEC-002 MAVEN PFDPU MAV-IDP-MEC-020 DAP Assy MAV-IDP-MEC-022 IIB Assy MAV-IDP-MEC-026 REG Assy MAV-IDP-MEC--028 DCB Assy Schematics & PCB Layouts (REG, IIB, DCB, FPGA Daughter Board) MAVEN_PF_TP_046_PFP_FM_Integration&Test MAVEN_PF_TP_042_REV A PFDPU_Vibration_Test Procedure MAVEN_PF_TP_044_PFDPU_Thermal_Vac_Test MAVEN_PF_TP_031_PFDPU_CPT MAVEN_PF_TP_045_PFDPU_LPT MAVEN IPER May 22 -23, 2012 17 -6

Status/Test Results - DCB • DCB and FPGA Daughter Board – Both Flight Boards have been received and have passed board level test • MAVEN_PF_PFDPU_DCB_600 C_TESTPLAN – – Initial test using prototype FPGA daughter board Final test/characterization using flight FPGA daughter board Cleaning/Conformal Coat and final assembly completed Following board level recheck, ready for PFDPU Integration • FPGA – Final flight port completed as of 28 FEB 2012 – Static Timing Analysis predicts 21 MHz operation over temperature/radiation environment (FPGA SCLK = 16. 8 MHz) – Flattenned/backannotated simulation verification – All realtime tests successful MAVEN IPER May 22 -23, 2012 17 -7

DCB and FPGA Daughter Board MAVEN IPER May 22 -23, 2012 17 -8

DCB Current Measurements Voltage Nominal Current (PREDICT) Max Current (PREDICT) Measured On Flight Boards at Ambient +5 VA 20 m. A 50 m. A 17 ma / 1 m. A -5 VA 25 m. A 50 m. A 25 ma / 1 m. A +5 VD 5 m. A 10 m. A 1 m. A +3. 3 VD 220 m. A 450 m. A 65 – 100 m. A +1. 5 VD 150 m. A 350 m. A 95 – 110 m. A Actual current drain is somewhat less than predicted (FPGA Designs tools have tended to give pessimistic estimates). Draw on analog supplies has been reduced by keeping the ADC in standby mode most of the time. Stability of supplies has been verified with REG board. Power turnon profiles of FPGA supplies verified with REG/DCB boards (stable within 5 ms, 1. 5 V supply on prior to 3. 3 V supply crossing to a logic “high”). MAVEN IPER May 22 -23, 2012 17 -9

Status/Test Results - REG FM 1 MAVEN IPER May 22 -23, 2012 17 -10

REG Test/Qualification Tests in process for FM 1 and FM 2: System clock sync Main converter inrush current Output switches function Output voltage regulation and ripple over output load and input voltage ranges Efficiency versus input power Main transformer waveforms Current and voltage monitor calibrations Output over-current sense function On board thermometer Actuator section inrush current Actuator function Actuator dead man timer function Status: Improved resistor is required for the Current Monitor (IMON) circuit Awaiting Flight parts (Vishays) (due 5/14) Soft start modification/test underway MAVEN IPER May 22 -23, 2012 17 -11

IIB Flight IIB MAVEN IPER May 22 -23, 2012 17 -12

IIB Test/Qualification/Status Flight board tests completed: Parts installation inspection Connector pin-to-pin measurements Tantalum capacitor power-on polarity Power converter waveforms Output voltage regulation Output voltage ripple Input current ripple Power efficiency Status: Cleaning completed Conformal Coat scheduled for week of 14 MAY 12 MAVEN IPER May 22 -23, 2012 Measured Efficiencies LPW Half load: 73. 7% Full load: 77. 8% SEP Half load: 73. 7% Full load: 78. 6% MAG 1 Half load: 62. 6% Full load: 70. 1% MAG 2 Half load: 61. 2% Full load: 70. 6% 17 -13

PFDPU CPT and LPT • Comprehensive and Limited Test Plans – Exercise the DCB and REG (and the IIB as needed) • Focus on subsystems not covered by the Instrument CPTs – Flexible configuration • Can be run with any number of instruments integrated • Option to perform MAG Heater Control and Actuator Subsystem checkouts • Can be performed with GSE or Instrument Hardware – Analog Housekeeping logged to facilitate trending • Most test executions run at 28 V IN to allow comparisons between various results • CPT – One hour test per instrument • Goal: run the CPT for the entire suite within 1 day • Tests both sections of the PFDPU (redundant DCB/REG) and both S/C Interfaces (redundant A/B sides) • LPT – Reduced version of CPT (runs in about 10 minutes) • Goal: run the LPT for the entire suite in about 1 hour – Operates on one section of PFDPU and one S/C Side (configurable per test) MAVEN IPER May 22 -23, 2012 17 -14

PFDPU Integration and Test Flow MAVEN IPER May 22 -23, 2012 17 -15

PFDPU PFRs The majority relate to manufacturing issues, minor layout or parts tuning Most require minor rework, for some the disposition is to “leave as-is” Solutions are implemented, we are awaiting final sign-off PFR_052 (REG) involves damage requiring parts replacement FRB held Analysis identified damaged or stressed parts All damaged and stressed parts replaced and re-tested Ready to close MAVEN IPER May 22 -23, 2012 17 -16

Requirements Validation (FRD and ERD Based) FRD Based ERD Based MAVEN IPER May 22 -23, 2012 17 -17

Requirements Validation (ICD Based) Snapshot of PFDPU Requirements (First 6 out of 25 PFDPU Related Requirements shown above). Excerpted from MAVEN_PF_SYS_033 B_Verification. Matrix Most items verify the S/C to PFDPU Interface (both functional and low level hardware) Some items are tested/verified with the FM I & T Procedure; others will require dedicated test reports. Some functional tests are generic and can be performed on the ETU with results extrapolated to Flight. MAVEN IPER May 22 -23, 2012 17 -18

MAVEN PFDPU Particle and Fields Data Processing Unit Bill Donakowski UCB/SSL Mechanical Engineer billd@ssl. berkeley. edu MAVEN IPER May 22 -23, 2012 17 -19

PFDPU Overview § 11 Individual Cards Bolted Together § Open Frames, 6061 T 6 Al § Separate S/C Attach Bracket § Bolted to S/C via 6 X 8 -32 bolts § Thermally coupled to S/C § Electrically grounded to S/C § Ground Straps § Straps provided by L-M § Black anodized exterior surfaces § No Thermal Blankets § Mass CBE 7 Kg MAVEN IPER May 22 -23, 2012 17 -20

PFDPU STATUS and SCHEDULE • Analysis (FEM Dynamics/Steinberg) Completed • Box Structural Enhancements Incorporated • Flight Hardware Status – UCB Flight Hardware Build nearly complete (SEP/REG/DCB/IIB) – LASP hardware (BEB/DFB) delivery imminent – GSFC hardware (MAG, ACHE) delivery imminent • • Card Electrical Check-out May/June 2012 Complete PFDPU Build-Up July 2012 Vibration Testing August 2012 TVAC Testing August - September 2012 (UCB/SSL) MAVEN IPER May 22 -23, 2012 17 -21

Structural Dynamics Analysis • Steinberg Fatigue Life Analysis/FEM Analysis Approach Utilized • Concern: Failure of electrical components (primarily leads of large chips) due to fatigue • Analysis Completed on Individual Frames and PFDPU Assy – UCB (Pankow) for DEB, REG, SEP, IIB – LASP/GSFC for MAG, DFB, REG – Analysis reviewed and approved by Project • Project Design Guidelines Established – Individual Cards redesigned to increase stiffness – Max card stiffness below 300 Hz – PFDPU Structural Packaging stiffness increased • Minimum 600 Hz (2 X 300 Hz) • Per Steinberg approach MAVEN IPER May 22 -23, 2012 17 -22

Box Structural Enhancements Frame Side Walls Thickness Increased; New Shear Panels Introduced §PCBs bonded to Frames §Hysol EA 9309 w/ Boron Nitride Filler §SEP, REG, IIB, DCB §Increases Box Stiffness §Allows better thermal path to Frames New 2 X Side Shear Panels, . 080” Thick (6061 T 6) 4 -40 Screws and Washers MAVEN IPER May 22 -23, 2012 Each Side Box Frame Walls Thickness increased to. 150” (was: . 100”) (6061 T 6) LASP/GSFC Cards Frames redesigned by host organizations to stiffen frames 17 -23

PFDPU Vibration Testing • Test Procedure MAVEN_PF_TP_042_PFDPU_Vibration_Test • Scheduled for August 2012 • First test of completed Unit • Protoflight Hardware • Hardware to be kept clean by bagging • Standard Test Protocols Pass/Fail Criteria • Box unpowered throughout testing • Pre- and Post- electrical checkout to be performed at SSL MAVEN IPER May 22 -23, 2012 17 -24

MAVEN PFDPU TVAC Testing MAVEN IPER May 22 -23, 2012 17 -25

PFDPU TVAC Testing • Test Procedure – MAVEN_PF_TP_044_PFDPU_Thermal_Vac_Test • Scheduled for August - September 2012 • PFDPU TVAC to be performed in SSL Chamber (Snout 1) • Hardware to be kept clean by bagging during transfer to Thermal VAC Chamber • Overview has been presented by Thermal Engineer – One non-op cycle from – 30 to +60 C – 7 operational cycles from – 30 to +50 C (as measured at the baseplate) – Bakeout at 60 C following the Electrical Testing MAVEN IPER May 22 -23, 2012 17 -26

PFDPU TVAC Cycles Cycle 1 Number : 2 3 3 4 5 6 7 2 1 9 5 4 8 n Performance test executed at each hot and cold plateau CPT (performed at first and last hot/cold cycles) verifies both redundant sections of the PFDPU, along with PFDPU resident instrument functionality (such as Actuators and Heater subsystems) Flight Magnetometers in chamber with PFDPU for TVAC qualification MAVEN IPER May 22 -23, 2012 17 -27

PFDPU TVAC Functional Plan Overview Step Plan 1 2 Establish setup (cleanliness checked, PFDPU and associated hardware/cabling in chamber, GSE connected via chamber feedthroughs). Perform initial CPT at ambient, prior to pump down. Turn the power off. Transition to Hot Survival unpowered. Dwell for 16 hours. Transition to Cold Survival unpowered. Dwell for 16 hours. 3 Transition to First Hot Cycle. Turn power on and perform first (hot) CPT. Soak for two hours and perform LPT. Transition to First Cold Cycle. 4 Turn power off. Stabilize. 5 6 7 8 9 Turn power on and perform first (cold) CPT. Transition to Hot/Cold Operating, powered for these 7 cycles. Soak at Hot/Cold for >2 hours, run LPT at end of dwell. Switch Sections of PFDPU at the end of each cycle. Perform the LPT on the section powered section prior to switching. Turn power off. Stabilize. Turn power on and perform hot CPT. Soak for two hours and perform CPT. Turn power off. Stabilize. Turn power on and perform cold CPT. Soak for two hours and perform CPT. Turn power off and transition to Bakeout Temperature. Bakeout for at least 16 hours. Perform CPT directly following the bakeout. MAVEN IPER May 22 -23, 2012 17 -28

PFDPU TVAC Hardware/GSE Configuration MAVEN IPER May 22 -23, 2012 17 -29

PFDPU – Wrapup/Questions • Much progress since CDR of May 2011 • Flight Hardware has been built and associated risks retired – Manufacturing: CGA 624 manufacturing successful – Mechanical: Improvements to PFDPU allay vibration concerns – Thermal: Heat conduction path enhancements & lower than expected current draws • Hardware/Software Integration validated with the ETU PFDPU – Operates as a parallel/alternate PFDPU Testbed – ETU Instruments have been combined into this setup – Available for “dry runs” of the CPTs, RTSs and software testing • High-Fidelity Simulator (ETU DCB and REG) functioning successfully at Lockheed-Martin since March’ 12 delivery • Integration of Flight PFDPU proceeding • Next Steps: Environmental Testing – EMC => Vibration => Magnetics => TVAC MAVEN IPER May 22 -23, 2012 17 -30

Backup Particle and Fields Data Processing Unit MAVEN IPER May 22 -23, 2012 17 -31

Controlling Documents • Mission Requirements – – MAVEN_PF_QA_002, PFP Mission Assurance Implementation Plan MAVEN-PM-RQMT-0005 D_MRD. xlsx MAVEN-PFIS-RQMT-0016 D+_2 -7 -2011. xlsx MAVEN_PF_SYS_033 B_Verification. Matrix. xlsx • Systems Requirements Document – MAVEN_PF_SYS_003 – Power Converter Requirements – MAVEN-SYS-RQMT-0010 – Environment Requirements • Interface Control Documents – MAVEN_PF_SYS_004 I_PFDPUto. Instrument. ICD – MAVEN-SC-ICD-0007 - Spacecraft to PF ICD – MAV-IDP-MEC-003 MAVEN PFDPU MICD MAVEN IPER May 22 -23, 2012 17 -32

PFDPU Driving Requirements (1) MAVEN IPER May 22 -23, 2012 17 -33

PFDPU Driving Requirements (2) MAVEN IPER May 22 -23, 2012 17 -34