HEC Cold Electronics Ga As IC 8 preamplifier

HEC Cold Electronics Ga. As IC: 8 preamplifier channels 2 summing amplifiers PSB boards with IC‘s are mounted at the outer circumference of the HEC wheels; 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 1

HEC Cold Electronics PSB boards Concept of ‘active pads‘, i. e. signals from (2/4/8/16) pads are amplified and summed (ASIC) to the required output signals in cold ; Optimal signal to noise ratio; Technology chosen: Ga. As Tri. Quint QED-A 1 m; excellent high frequency performance, stable operation at cryogenic temperatures, radiation hardness; For upgrade PSB boards would be replaced with pin-compatible new boards with new IC’s; this can be done at the outer circumference of a HEC wheel without rotating and disassembling the wheel 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 2

HEC Cold Electronics: replacement Huge task to replace all PSB boards of all HEC wheels in rather short time (18 months, including warm-up/cool-down): de-cable and re-cable again with all the required QC tests as have been done in B 180 (in substantial longer time period); All actions need to be done in the ATLAS pit; Endcap calorimeters including PSB boards are ‘nuclear waste material’: special procedures for handling and safety operations required to keep the exposure to radiation below the legal limits; Major engineering task in terms of tooling, work flow and workload optimization; 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 3

HEC Cold Electronics: Radiation Hardness Seven chips exposed to total neutron fluence (fast) of up to 1. 11 1015 n/cm 2; Eight chips exposed to total dose of 55 k. Gy; ATLAS: expect in 10 years neutron fluence of 0. 2 1014 n/cm 2 ; Degradation of performance sets in at typically 3 1014 n/cm 2 ; 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 4

HEC R & D plans: new, more radiation hard IC‘s Radiation hardness up to a factor of 10 better, i. e. up to neutron fluence of few 1015 n/cm 2; Low power consumption (avoid boiling LAr HV !!!), do not exceed present level of < 0. 2 W; Gain variation between warm and cold not more than a factor of 2, because most QC tests have to be done in warm; this is a particular difficult requirement as applicable technologies model calculations exist only down to -40 C; Low noise, should not exceed present level; Gain variation of individual preamplifier channels has to stay in one IC below 1% (calibration of the total channel only!); IC has to be safe with respect to potential HV discharges in the gaps of the HEC calorimeter; 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 5

HEC: Specification of new cold electronics Radiation hardness (10 years s. LHC): : 50 k. Gy; n: 1. 5 1015 n/cm 2; p: 1. 2 1012 p/cm 2 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 6

Study of radiation hardness of various technologies – irradiate specific transistors in n-beam IHP (pnp is not consid ered) SGB 25 V 250 nm Si. Ge Si Ga. As Bipolar HBT CMOS FET IBM 8 WLBi. CMO S 130 nm - MB npn 0. 84*0. 42 (+ ESD) AMS Bi. CMOS 130 nm Sirenza ? IHP SGB 25 V 250 nm amplifier npn nmos pmos 0. 12*1*2 (H) SBC 3 0, 35*2, 4 SGA-8343 350*0. 24 (n 1) 350*0. 24 (p 1) 0. 12*12*2 (K) SBC 30 0, 35*24 SGA-8543 750*0. 24 (n 2) 750*0. 24 (p 2) 0. 12*3*4 (L) SBC 300 0, 35*96 Material Transistor Triquint Sirenza producer CFH 800 250 nm (? ) 250 nm Process p. HEMT 800*0. 4 Type 600*0. 5 (T 1) Size(µm 2) 300*0. 25 (T 2) 0. 12*8*1 (M) 0. 12*16*6 (P) 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 7

Measurements at Rez: set-up Testboard 10*8 cm 2 Example: IHP transistors: four structures (2 n, 2 p) are bonded in this ceramic package; 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 8

Network analyzer: S-parameter measurement Measurement of reflected and incident voltages; Measurement is done at a reference impedance (50 Ω); Measurements are done in frequency domain (value, phase) → full description of device to be studied; Broad frequency range (up to few GHz); 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 9

Measurements at Rez: set-up 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 10

Measurements at Rez: set-up Testing up to 37 devices (transistors); Measuring DC values and Sparameters; Measuring during neutron irradiation; 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 11

Neutron Irradiation at Rez/Prague: Set-up: typically 10 boards aligned in n-beam p-beam Deuterium target 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 12

Neutron Irradiation at Rez/Prague: Neutron flux for different slots and energy spectrum 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 13

HEC Cold Electronics – online monitoring from Rez run Event # 151 Total flux Event # 151 × 1015 Event # 151 U/I Total flux × 1015 temperature × 1015 Total flux × 1015 Example: IHP Si. Ge Bipolar – slot 1 … last ‘event‘ …. 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht × 1015 Total flux up to 2. 2 · 1015 14

Results example: Ga. As p. HEMT (Sirenza): 600*0. 5 (T 1), 300*0. 25 (T 2) Slot 4 Slot 10 2 · 1014 cm-2 1/15/2022 2 · 1015 cm-2 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 15

Results Loss of gain (%) at integrated n-flux of 2 · 1014 cm-2 Si. Ge Si Ga. As Bipolar CMOS FET IHP IBM Sirenza 0% 0% 0% 0. 5% 0% -5% 5% 0% 0% 1/15/2022 IHP nmos pmos Material Type of Transistor Triquint Sirenza 0% 0% 1% (1) -1% (2) 0. 5 MHz 0% 0% 0% 1% (1) -2% (2) 10 MHz 0% 0. 5% 1% 0% 0. 5% (1) -0. 5% (2) 40 MHz 0% 0% 0% 2% 3% (1) -1% (2) HEC: Upgrade of Cold Electronics - February 2009, P. Schacht producer 90 MHz 16

Results Loss of gain (%) at integrated n-flux of 2 · 1015 cm-2 Si. Ge Si Ga. As Bipolar CMOS FET IHP IBM Sirenza -15% 0% 0% 1% (1) 3% (2) 5% 5% 15% 3% 2% 2% 3% 15% 20% IHP nmos pmos Material Type of Transistor Triquint Sirenza 1% -1% 2% (1) -4% (2) 0. 5 MHz 2% (1) 4% (2) 4% 0% 4% (1) -5% (2) 10 MHz 0. 5% (1) 3. 5% (2) 3% 3. 5% (1) -1. 5% (2) 40 MHz @1. 2· 1015 1% 3% 10% 8% @1. 2· 1015 2% producer 90 MHz @1. 2· 1015 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 17

Results Loss of gain (%) at maximum integrated n-flux reached for the specific device Si. Ge Si Ga. As Bipolar CMOS FET IHP IBM Sirenza @2. 2· 1016 @3. 6· 1015 @2· 1015 40% 0% 0% 6% (1) 11% (2) 80% 15% 75% 11% 75% 1/15/2022 IHP @8· 1015 nmos pmos Material Type of Transistor Triquint Sirenza @1. 2· 1015 @2· 1015 7% -1% 2% (1) -4% (2) 0. 5 MHz 5% (1) 10% (2) 10% 0% 4% (1) -5% (2) 10 MHz 15% 4% (1) 11% (2) 11% 2% 3. 5% (1) -1. 5% (2) 40 MHz 20% 8% 11% 10% 8% 90 MHz HEC: Upgrade of Cold Electronics - February 2009, P. Schacht producer 18

Results: DC measurements Si. Ge DC measurements ('Gummel plots') before and after irradiation: measure base & collector currents for different UBE ; Example: IHP Si. Ge bipolar without irradiation; Current gain IC/IB !!! 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 19

Results: DC measurements Current gain IC/IB; Si. Ge - Bipolar HBT Material IHP IBM Sirenza producer 182 131 176 (IC/IB)Max (UBE=0. 6 V, IB= 0. 16 n. A) (UBE=0. 67 V, IB= 49 n. A) (UBE=0. 66 V, IB= 3. 2µA) Voltage & base current @ 8· 1014 cm-2 @ 4· 1014 cm-2 @ 3· 1014 cm-2 Radiation Level 149 95 114 (IC/IB)Max (UBE=0. 78 V, IB= 0. 15µA) (UBE=0. 8 V, IB= 3. 1µA) (UBE=0. 66 V, IB= 13. 3µA) Voltage & base current @ 2· 1015 cm-2 Radiation Level 55 (IC/IB)Max (UBE=0. 68 V, IB= 0. 91 m. A) (current limit) Voltage & base current @ 2. 3· 1016 cm-2 16 (UBE=0. 84 V, IB= 12µA) 1/15/2022 @ 3. 7· 1015 cm-2 72 (UBE=0. 87 V, IB= 33µA) HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 20

Results: Dependence of gain on temperature Gain at room temperature is 100%; Si. Ge Si Ga. As Material Bipolar CMOS FET Type of Transistor IHP IBM Sirenza 0 0 0 +1, 7% 0 0 0 1/15/2022 IHP nmos pmos Triquint Sirenza producer +4, 2% +3. 1% +86% Gain at 0. 5 MHz (-196°C) +2% +11% +3. 6% +89% Gain at 10 MHz (-196°C) +11, 6% +27. 5% -56% -4, 2% Collector current (-196°C) HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 21

HEC Cold Electronics -Conclusions Summary from 'Mini Review‘ February 12/13 th at MPI: n Radiation hardness of technologies studied OK for HEC; n Si CMOS FET & Ga. As FET more stable with temperature; n Bipolar technologies: strong dependence on temperature, operation point needs adjustment for temperature dependence; n CMOS: maybe problems with line driver with dynamic range – to be tested; n γ-irradiation: needs to be looked at, but lower priority; Next steps: n One more irradiation run with AMS transistors; n Modify set-up at Rez to allow for irradiation in cold; more studies on n-flux (energy and radial dependence) n Study 2 -3 options simulating HEC preamp+summing amplifier; n Design/test PA+SA using transistors+external components; n Design full chip Goal: Have full chip ready for 2010 (? ). In parallel: n Design new PSB board n Investigate installation at ATLAS n Prepare new (more rad. hard) LV system 1/15/2022 HEC: Upgrade of Cold Electronics - February 2009, P. Schacht 22