ASU MAT 591 Opportunities in Industry Algorithm Architecture

ASU MAT 591: Opportunities in Industry! Algorithm Architecture for Synthetic Aperture Radar (SAR) Ground Processing Gary A. Mastin, Ph. D. Lockheed Martin Management & Data Systems Intelligence, Surveillance, and Reconnaissance Systems Litchfield Park, Arizona 1

ASU MAT 591: Opportunities in Industry! Overview SAR Processors - History l Driving Algorithm Functions - Review l Algorithm Architecture vs. Computer Architecture l Discussion Question l 2

ASU MAT 591: Opportunities in Industry! In The Beginning… GEMS Precision Optical Correlator 3

ASU MAT 591: Opportunities in Industry! The Advent of Digital Electronics HIRSADAP 4

The Benefits of the 1960 s Space Program ASU MAT 591: Opportunities in Industry! The advent of Digital Image Processing technology l The problem: l – We needed pictures of the moon’s surface for selecting landing sites – If the imaging spacecraft couldn’t return to earth, image capture by film wasn’t possible – Late 1960’s television technology was power hungry, heavy, and bulky, but the pictures were pretty good. (Yes, black & white images are good!!!!) – Size, power, and weight constraints limited what we could launch – We didn’t have the communications bandwidth to broadcast live video to the earth from the spacecraft 5

The Benefits of the 1960 s Space Program ASU MAT 591: Opportunities in Industry! l The solution: – Send lower-quality cameras into space to meet the size, power, and weight constraints – Characterize the camera deficiencies prior to launch – Turn the video image into a grid of numbers representing intensity onboard the spacecraft. Buffer the data on board, then dump it over the communications link as fast as possible … preferably before crashing into the moon’s surface! – Treat images like large mathematical matrices! Use computers on the ground to correct the camera deficiencies after data receipt. – While we are at it, lets also correct for contrast … and for motion blurs … and for perspective … and, hey, this is pretty powerful stuff!!! l Other applications – Medicine – Defense Synthetic Aperture Radar 6

ASU MAT 591: Opportunities in Industry! Advent of the “Mini-Computer” l The Digital Equipment Corporation (DEC) PDP-series made computing affordable – PDP 8, PDP 10 – PDP 11/45 Big step forward § § § § ~256 KB of core memory Video terminal for input instead of cards or paper tape Attached disk, 10 s of MB per disk pack (multiple platters) 800 bpi 9 -track tape for archive RSX 11 M operating system supported multiple tasks Efficient DEC Fortran compiler, assembler, editor, linker, loader… Interface to peripherals l l l Video monitors with disk buffers or even core. Dedicated image display functions! Fixed-point and floating-point FFT hardware For $250, 000 to $750, 000, a department or a small company could have its own image processing system. 7

DEC VAX 11/780 – The Workhorse of 1980 s ASU MAT 591: Opportunities in Industry! 8

Early Digital SAR Image Formation System ASU MAT 591: Opportunities in Industry! l Systems like the VAX 11/780 were augmented with peripherals for SAR data input, algorithm processing, and display Phase History Film Digitizer VAX 11/780 System DCRSI High Density Digital Tape Comtal Digital Image Processor 1600 bpi 9 -Track Tape Video Display Input Output Processing Floating Point Systems AP-120 B Array Proc. Dunn Camera Vidicon Camera 9

ASU MAT 591: Opportunities in Industry! SAR Processing Algorithms l l With the flexibility of programming in compiled languages came algorithm innovation “Simple” Matter of Programming Nomenclature c c RFG_CC +1 Forward -1 Inverse DFC Data Format Conversion Fourier Transforms CTM Corner Turn OFR Output Format c r RFG_CR Reference Function Generators Data I/O IPF In -Plane Filter CPF Cross CPF Complex -Plane Filter Array Filter DET Magnitude Detect Interpolation Filters 10

ASU MAT 591: Opportunities in Industry! Modern Spotlight SAR Algorithm 11

ASU MAT 591: Opportunities in Industry! Key SAR Processing Functions l Dechirp and Range Deskew Near Range Receive Pulse Instantaneous Transmit Freq. Tp fc t=0 Dechirp Reference Far Range Receive Pulse Time B Scene Center Receive Pulse Transmit Pulse Before Dechirp A/D Interval After Dechirp 2 Ra/c –Dr/c Freq. After Dechirp Near Range Return BIF Adapted from Spotlight Synthetic Aperture Radar: Signal Processing Algorithms By W. Carrara, R. Goodman, R. Majewski, Artech House, 1995. 2 Dr/c Tp Center Range Return Time Skew Far Range Return 12

ASU MAT 591: Opportunities in Industry! Key SAR Processing Functions Radial Position Of Annulus Determined by Radar Center Frequency Collection Surface (Slant Plane) Fourier Reflectivity Space Annular Extent Of Data Annulus Determined by Collection Time Length of Annulus Determined by Radar Bandwidth Radar Depression Angle That Determines the Slant Plane Adapted from Spotlight Synthetic Aperture Radar: A Signal Processing Approach by Jakowatz, Wahl, Eichel, Ghiglia, and Thompson 13

ASU MAT 591: Opportunities in Industry! Key SAR Processing Functions Polar Format Processing (Polar Reformatting) Range Frequency Direction l Azimuth Frequency Direction Input Sample Output Sample 14

ASU MAT 591: Opportunities in Industry! Key SAR Processing Functions Direction of 1 -D FFT Corner Turn (Transpose) Contiguous Addresses “M” samples/new vector 2 -D FFT Contiguous Addresses “N” samples/vector l “N” New Vectors “M” Vectors Time 15

ASU MAT 591: Opportunities in Industry! Key SAR Processing Functions Detect and Intensity Remap Piece-Wise Linear Remap (R 2 + I 2) Log 10 Output Intensity l Input Intensity 16

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! l The algorithm processing requirements USUALLY define the computer – Project/Program Requirements § § § Time to solution (throughput) Data acquisition geometries & modes Range of data set sizes Processing options in the baseline algorithm – Derived Requirements that Define the HW Architecture § § § Sustained/Peak FLOPS (floating point operations per second) Main memory size Processor to memory bandwidth Memory to memory bandwidth Disk I/O bandwidth Processed and Unprocessed data archive size 17

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! l Cost and Technology issues force compromises – Can’t store the input and output data totally in main memory § § Implies a multiple-ingest approach Large data management implications – Computation-bound. One CPU can’t handle the load. § § § Implies parallel processing, special purpose processors, or both Perhaps exploit mathematical separability to improve efficiency Further data management implications – I/O-bound § § § Overlapped processing and I/O? Parallel I/O streams? Even greater data management implications – Memory bandwidth-bound. Large corner turns are too slow. § § Hardware architecture implications Again, data management implications 18

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! l l Data management for the computer architecture is a significant algorithm complexity factor! I can probably architect a dedicated system for SAR ground processing, but… I don’t want to have different algorithms for different computer architectures Is it possible to architect an algorithm for maximum portability? – Lets explore the data management issues, then decide 19

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! l Multiple Ingest – First scenario (brute force) 2 1 Algorithm Function 1 3 4 Algorithm Function 2 9 6 5 8 7 10 15 12 11 14 13 Algorithm Function 3 16 18 17 – Second (sequential) & Third (parallel) scenarios 1 1 4 1 7 1 Algorithm Function 1 2 2 5 2 8 2 Algorithm Function 2 3 10 3 4 6 12 3 4 9 14 3 4 Algorithm Function 3 11 5 13 5 15 5 20

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! 21

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! Computation - Bound – Mathematical Separability § Some 2 -D tasks are performed more efficiently as separable 1 -D tasks Range Frequency Direction l Azimuth Frequency Direction Input Sample Output Sample Range Frequency Interpolation Input Sample Output Sample Azimuth Frequency Interpolation 22

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! l I/O – Bound – Multiple options for overlapping Input, Processing, and Output § Sequential Buffering with Processing Input Memory Buffer § Output Memory Buffer Algorithm Function Overlapped I/O and Processing Input Memory Buffer A Algorithm Function Input Memory Buffer B Output Memory Buffer A Algorithm Function Output Memory Buffer B 23

Algorithm vs. Computer Architecture ASU MAT 591: Opportunities in Industry! l Memory Bandwidth – Bound – Distributed Memory Message Passing Exchange Algorithm Perform a local corner Turn on each block Block # Do I = 1, np-1 myswap = XOR(me, I) Send block “myswap” on PE “me” to PE “myswap” Receive block “myswap” on PE “me” from PE “myswap” END DO Block # PE # A B C D A E C D E F G H I J K L Block # B F G H I J K O M N O P M N L P Start Iteration 1 PE # A E I D A E I M B F G N C J K O Block # B F J N C G K O M H L P D H L P Iteration 2 Iteration 3 24

ASU MAT 591: Opportunities in Industry! Discussion Question l l l If I want to execute mathematically the same algorithm on the Network Computers that is executed on the Production Computer…. And if I want to minimize the number of software implementations of the algorithm for cost savings… Then how should I design my algorithm architecture? Network Computer #1 SGI/Cray J 90 64 -bit Word 8 Processors Shared Memory Vector Processor Production Computer Fiber Optic Wide-Area Network Archive Product Distribution Network Computer #4 Network Computer #2 IBM Regatta 32 -bit Word 16 Processors Shared Memory Network Computer #3 Sun Blade 2000 32 -bit Word 1 Processor Shared Memory SGI Origin 3000 32 -bit Word 128 Processors Distributed Memory Message Passing 25

ASU MAT 591: Opportunities in Industry! Discussion Question l Lets consider the problem in pieces – How will I use memory efficiently if one computer has a native word length of 64 bits and the others have a native word length of 32 bits? – What are the data management issues when the entire input and output data will not fit into main memory? § § § Consider non-square input phase history Remember that we are performing mixed-radix 1 -D FFTs (2, 3, 5, 7) What impact does implementation on a distributed-memory message-passing architecture have on memory management? – How will we perform an out-of-core transpose on a shared memory computer … § § If the computer has one processor? If the computer has multiple processors working simultaneously on different parts of the data set (multiple ingest)? 26

ASU MAT 591: Opportunities in Industry! Conclusion Hopefully, you can see that creating an architectureindependent transportable algorithm is a daunting challenge. l Hopefully, you understand that addressing this problem early can cost a lot of money, but over time could save large amounts of money in software development and maintenance. l Solving this problem can build customer confidence that your software produces exactly the same result regardless of the computing platform. l 27