Tiny SDR Mehrdad Hessar Ali Najafi Vikram Iyer

Tiny. SDR Mehrdad Hessar*, Ali Najafi*, Vikram Iyer, Shyam Gollakota *Co-primary Student Authors

Io. T Ecosystem is Fast-Changing 2009 2015 2016 2017 ? ? ?

Academic community’s impact has been limited • Each protocol requires a dedicated inflexible chip • Many are proprietary Little room for innovation Can’t easily scale Io. T testbeds or develop new low-power protocols

Ideal Io. T Network Testbed Battery-operated, duty-cycled SDR devices 99 9 999 99 9

SDR must model constraints of Io. T endpoints • Support duty-cycle Ultra-low power sleep mode • Battery-operated Low-power tx/rx mode • Ability to update PHY and MAC over-the-air wirelessly • Support interfaces with sensors

Existing SDRs don’t satisfy these requirements • Sleep power 10000 times too high • Radio module consumes high power for tx/rx Sleep Power Consumption (m. W) 140010000 12001000 N/A N/A RX TX • 1000 Require USB or Ethernet to update firmware 100 800 10 600 1 400 0. 1 200 0. 01 0 F R P P R D R R e S 0 lad R 0 F me R US 3 R 10 P US R 2 P i 0 0 D n i. b i 4 e L 2 S X UES 310 USB 200 blad. 0 ime. M ni B U L Mi 2 E B No TX T R uto l o i D l P to R S u. SD u DR Galio. T l P R S a D u G S R D y. S DR n i T y. S Tin

Tiny. SDR • First low-power SDR platform which supports over-the-air update for PHY and MAC layers • 30 u. W in sleep mode Ø 10000 x lower than existing platforms • Supports 900 MHz and 2. 4 GHz ISM frequency bands, 4 MHz bandwidth and digital/analog sensor interfaces • Has high sensitivities that match custom radio chipsets Ø -126 d. Bm sensitivity for Lo. Ra at 6 Kbps Ø -94 d. Bm sensitivity for Bluetooth beacons

Tiny. SDR Platform Design • Physical layer design • MAC layer design • Over-the-air update

Physical Layer Requirements • I/O supports 4 MHz bandwidth Ø Each I/Q sample 32 bits 128 Mbps • Real-time processing of 128 Mbps data Ø De/modulation running at line rate Achieve these I/O and processing capabilities on a low-power device

Low-Power FPGA for PHY Flash-Based SRAM-Based Sleep Built-in sleep mode Requires shutoff Boot Time 4 -5 ms 20 ms Cost > $40 $5 -6 We use Lattice ECP 5 SRAM-based FPGA Ø Operate FPGA at 64 MHz Ø Has sufficient resources; Lo. Ra Modulator (4%) Demodulator (11%)

Tiny. SDR Platform Design • Physical layer design • MAC layer design • Over-the-air update

FPGA for MAC leads to energy waste Lo. Ra Packet Sleep Rx slot 1 End Device 1 second Base station FPGA ON: wasting 127 m. J Rx slot 2

Our Solution: Io. T MAC on Microcontroller • Enables energy efficient MAC protocol • Consumes only 2μW in sleep mode Ø More than 10000 times less than FPGA Big advantage of programmability Ø C programming vs HDL programming Ø Speed up innovation for MAC researchers

Tiny. SDR Platform Design • Physical layer design • MAC layer design • Over-the-air update

Over-the-Air Update 99 9 999 99 9

Dedicated Backbone Radio • Why dedicated radio? Ø Support fail-safe mode if PHY or MAC layer have issue • Which radio? Lo. Ra Ø Supports long range up to a kilometer Ø Low-power consumption in Rx/Tx modes Challenge: Large FPGA/MCU firmware Ø 570 KB FPGA file takes 14 min at 5 kbps

Our Solution: Compress Chunks of Firmware 1 2 3 4 Microcontroller Memory . . . 3 4 2 1 Compression FPGA 1 2 3 4 Flash . . .

Over-the-Air Update: Evaluation

Over-the-Air Update: Evaluation FPGA: Lo. Ra FPGA: BLE MCU: Lo. Ra/BLE 1 CDF 0. 8 0. 6 0. 4 0. 2 0 0. 5 1 1. 5 2 2. 5 Duration (minutes) 3 3. 5 4 Update Lo. Ra 2100 times and BLE 5600 times

Tiny. SDR Architecture Physical Layer FPGA 2. 4 GHz I/Q Sub-GHz I/Q Microcontrolle r MAC Protocols Flash Sensor Controller ADC DAC VMCU Lo. Ra Radio Over-the-Air Programming Power Management [30 μW] VFPGA VBat . . . VPA

Tiny. SDR • First low-power SDR platform which supports over-the-air update for PHY and MAC layers • 30 u. W in sleep mode Ø 10000 x lower than existing platforms • Supports 900 MHz and 2. 4 GHz ISM frequency bands, 4 MHz bandwidth and digital/analog sensor interfaces • Has high sensitivities that match custom radio chipsets Ø -126 d. Bm sensitivity for Lo. Ra at 6 Kbps Ø -94 d. Bm sensitivity for BLE beacon