The RPC first level muon trigger in the

The RPC first level muon trigger in the barrel of the ATLAS experiment Andrea Salamon INFN Sez Roma II on behalf of ATLAS Level-1 Muon Barrel group VIII Workshop on Resistive Plate Chambers and Related Detectors 1

The Large Hadron Collider • • • Energy: 14 Te. V Luminosity: 1034 cm-2 s-1 Protons/bunch: ~ 1011 Bunch crossing rate: 40 MHz p-p interactions/bunch: ~23 Interaction rate: ~ 1 GHz VIII Workshop on Resistive Plate Chambers and Related Detectors 2

The ATLAS detector VIII Workshop on Resistive Plate Chambers and Related Detectors 3

The ATLAS muon spectrometer • • • Pseudorapidity coverage: up to | | < 3. 0 for precision measurement and up to | | < 2. 4 for trigger measurement Momentum measurement: deflection of muons in a region of 0. 5 -2 T Momentum resolution: at the level of 1% between 10 Ge. V and 100 Ge. V and at the level of 10% at 1 Te. V VIII Workshop on Resistive Plate Chambers and Related Detectors 4

The RPC muon trigger • • • Three RPC layers 2 gas gaps and 2 + 2 readout planes for each detector element 2 mm gas gap with bachelite electrodes Gas mixture: tetrafluoroethane (C 2 H 2 F 4) 94. 7% isobutane (C 4 H 10) 5% - sulfur exafluoride (SF 6) 0. 3% RPCs working in saturated avalanche mode Efficiency: > 98% Time resolution: ~ 1 ns Spatial resolution: 5 -10 mm Rate capability: ~ 1000 Hz/cm 2 VIII Workshop on Resistive Plate Chambers and Related Detectors 5

The first level muon trigger in the barrel • • Searches for high-p. T muons Track deflection in a magnetic field region Fast programmable geometrical coincidence (programmable cone opening) Algorithm performed separately in and • • • Bunch Crossing Identification Region of Interest: D x D = 0. 1 x 0. 1 Muon p. T Six programmable thresholds Low-p. T trigger (RPC 1+RPC 2) 5. 5 Ge. V/c High-p. T trigger (low-p. T+RPC 3) 10 Gev/c VIII Workshop on Resistive Plate Chambers and Related Detectors 6

The trigger processor • • The trigger processor is a very complex system highly integrated with the detector Synchronous distributed system Synchronous pipeline working at LHC clock Bunch Crossing ID, high-p. T muons selection 360000 ch @ 320 MHz -> 32 bit x 64 sectors @ 40 MHz Latency: ~ 40 BC It performs also DAQ functions, storing RPC hits during the latency period and performing the readout of selected events Overall power consumpion: ~ 20 k. W On-detector • 832 Splitter Boxes • 3328 Coincidence Matrices • 832 Pad Logic boards • 416 Optical Links Off-detector • 64 Sector Logic boards • 64 MUCTPI interfaces VIII Workshop on Resistive Plate Chambers and Related Detectors 7

The Coincidence Matrix ASIC (CMA) BC ID with a time resolution of 3. 125 ns D x D = 0. 2 x 0. 1 or D x D = 0. 1 x 0. 2 DLL for internal 320 MHz clock • Timing and digital shaping of FE signals (edge detector and programmable dead timer) • Masking of RPC noisy channels • Programmable depth pipeline (cables comp. ) Trigger path • Pulse width and mask to 1 • Declustering and majority logic • Programmable geometrical coincidence • Highest threshold selection Readout path (all hits stored in the CMA until LVL 1 A arrival) • LVL-1 latency memory • Derandomizers VIII Workshop on Resistive Plate Chambers and Related Detectors 8

The Coincidence Matrix ASIC (CMA) VIII Workshop on Resistive Plate Chambers and Related Detectors 9

The Coincidence Matrix ASIC (CMA) • CMOS 0. 18 u UMC • Pow. cons. ~ 0. 5 W • 5 mm x 5 mm VIII Workshop on Resistive Plate Chambers and Related Detectors 10

The Pad Logic board • • • 416 + 416 Pad Logic boards on-detector Each pad logic board covers a region D x D = 0. 2 x 0. 2 Receives data from 4 coincidence matrices 12 bit @ 40 MHz output Time adjustment with 1 ns steps Three step pipeline • Coincidence matrices time alignment • two highest thresholds selection and overlap handling • and views combination VIII Workshop on Resistive Plate Chambers and Related Detectors 11

The Pad Logic board • • All components tested for expected radiation levels Commercial FPGA: redundancy and configuration FF read-back. VIII Workshop on Resistive Plate Chambers and Related Detectors 12

Optical link • • One optical link for each high-p. T pad (416 optical links) (14+1) bit x 40 MHz synchronous with LHC clock Multiplexed trigger and readout data Trigger data: high priority - fixed latency Readout data: low priority - variable latency Ser. Des: HDMP 1032 A/1034 A Optical transceiver: HFBR 5912 E VIII Workshop on Resistive Plate Chambers and Related Detectors 13

The Sector Logic • 64 (2 x 16 x 2) Sector Logic boards in USA 15 for the whole barrel • Each sector logic board covers a region D x D = 1. 0 x 0. 2 • Receives data from 6 -7 high p. T pad logic boards • 32 bit @ 40 MHz output to Mu. CTPI Five step pipeline • Tile Calorimeter trigger towers coincidence (optional) • Low p. T thresholds outer plane confirmation (optional) • overlap resolution and overlap propagation • 1 st threshold search and association with a D x D = 0. 1 x 0. 1 region • 2 nd threshold search and association with a D x D = 0. 1 x 0. 1 region VIII Workshop on Resistive Plate Chambers and Related Detectors 14

The Sector Logic • 2 channels prototype • All trigger functions implemented • Emulated event-building • Used for test-beam, commissioning and test VIII Workshop on Resistive Plate Chambers and Related Detectors 15

The Sector Logic • • 8 channels prototype 4 RX mezzanines FPGA Xilinx Virtex II 1000 FPGA Xilinx Virtex II 2000 Trigger algorithm Event building Design complete, prototype expected in november VIII Workshop on Resistive Plate Chambers and Related Detectors 16

H 8 testbeam @ CERN in 2004 VIII Workshop on Resistive Plate Chambers and Related Detectors 17

H 8 testbeam @ CERN in 2004 • • Full trigger and readout slice tested from chambers to Mu. CTPI 2 high p. T towers + 2 low p. T towers in the lower part of the chambers (2 BML + 2 BOL RPC chambers) 25 ns run! Combined run with other sub-detectors CMA: old release (minor functional changes added in the final release) PAD: final release Optical link: final release Sector Logic: 2 channels prototype VIII Workshop on Resistive Plate Chambers and Related Detectors 18

Final CMA laboratory tests • • • Test vectors L 1 A from the TTC system Input from pad testpulse Time alignment Trigger output timing Data fragment integrity checks on 8 CMA belonging to the same trigger/readout slice: no fragments corrupted, no BC error, no LVL 1 ID error • 100 k. Hz LVL 1 A run: 1 event lost on 105 events VIII Workshop on Resistive Plate Chambers and Related Detectors 19

BB 5 integration • • After RPC-MDT integration trigger and splitter boxes (CMA + pad logic) are mounted on the detector and cabled MDT+RPC+trigger are finally tested on BB 5 cosmic ray test stand (dead channels, noise, cabling…) VIII Workshop on Resistive Plate Chambers and Related Detectors 20

Commissioning in the pit (sector 13) • Pre-production pad boards are now fully connected to FE-electronics and equipping sector 13 of the muon spectrometer VIII Workshop on Resistive Plate Chambers and Related Detectors 21

Conclusions and Outlook • The first level muon trigger in the barrel of the ATLAS experiment is a very complex system, highly integrated with RPC detectors • System design is (almost) frozen • Some parts are currently being finalized (mainly offdetector electronics) • RPC + MDT + trigger electronics have successfully been tested at the H 8 testbeam at CERN in 2004 • Laboratory tests were performed on last produced elements • Integration and commissioning at CERN is ongoing! VIII Workshop on Resistive Plate Chambers and Related Detectors 22