ERL Differential Current System Status Peter Cameron with

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ERL Differential Current System Status Peter Cameron with contributions from Michelle Wilinski and Christophe

ERL Differential Current System Status Peter Cameron with contributions from Michelle Wilinski and Christophe De. France (Bergoz) 17 Sep 07

Outline 1. Damage threshold estimate 2. Test setup pictures, block diagram, … 3. DSA

Outline 1. Damage threshold estimate 2. Test setup pictures, block diagram, … 3. DSA measurements a) Noise floor and DC drift b) Effect of temperature c) Conclusions from DSA measurements 4. FPGA measurements a) Block diagram b) measurement sensitivity 5. Discussion, conclusions, …

1 u. A-sec (6 x 10 12 electrons, or 1 u. C) used in

1 u. A-sec (6 x 10 12 electrons, or 1 u. C) used in the following slides

Bergoz Electronics Agilent FFT box Floppy Excel scope Bergoz Electronics signal generator FPGA board

Bergoz Electronics Agilent FFT box Floppy Excel scope Bergoz Electronics signal generator FPGA board ethernet Lab. VIEW Test Setup Block Diagram

Full span (PCT nominal BW is 10 KHz) noise spectrum not 1/f !!!

Full span (PCT nominal BW is 10 KHz) noise spectrum not 1/f !!!

Comparison of single toroid and difference spectra single toroid No averaging difference of the

Comparison of single toroid and difference spectra single toroid No averaging difference of the two toroids

Comparison with Bergoz measurement Bergoz – 5 averages (note log scale)

Comparison with Bergoz measurement Bergoz – 5 averages (note log scale)

400 Hz BW noise spectra Include spectral shaping in null?

400 Hz BW noise spectra Include spectral shaping in null?

Bergoz – 5 averages (note log scale)

Bergoz – 5 averages (note log scale)

Effect of temperature stabilization

Effect of temperature stabilization

Time/temperature dependence of difference current Out of office ~0. 1 n. A-sec drift over

Time/temperature dependence of difference current Out of office ~0. 1 n. A-sec drift over 160 minutes What happened here? ? ? B field change? 100 u. A/gauss gives. 02 gauss . 01667 u. A-sec on 1 minute

Zoom on previous slide . 0033 u. A-sec

Zoom on previous slide . 0033 u. A-sec

Conclusions from DSA Measurements 1. 2. 3. 4. 5. Toroids meet Bergoz spec in

Conclusions from DSA Measurements 1. 2. 3. 4. 5. Toroids meet Bergoz spec in uncontrolled conditions (temperature, magnetic field) of office test environment Study and optimize proper thermal shielding Frequent null calibration should not be needed Slow loss limit should be in the range of 1 n. A-sec or better Should be a useful diagnostic a) b) 6. Machine protection (unprecedented and essential) Halo studies at ~10 -6 need moveable scrapers? Need to understand vector averaging (more on this later)

Outline 1. Damage threshold estimate 2. Test setup pictures, block diagram, … 3. DSA

Outline 1. Damage threshold estimate 2. Test setup pictures, block diagram, … 3. DSA measurements a) Noise floor and DC drift b) Effect of temperature c) Conclusions from DSA measurements 4. FPGA measurements a) Block diagram b) measurement sensitivity 5. Discussion, conclusions, …

BPM (also FCT, DCCT, BLM, …) Block Diagram

BPM (also FCT, DCCT, BLM, …) Block Diagram

Test Setup Block Diagram ML 403 Bergoz Electronics FPGA wrapper A to D Bergoz

Test Setup Block Diagram ML 403 Bergoz Electronics FPGA wrapper A to D Bergoz Electronics signal generator Simulink ethernet Signal processing, feedback loop, MPS interface, … DAC DIO null MPS function runs independent of Control System - robustness Lab VIEW

Process Variables (machine mode, beam mode, …) Process Variables (beam position, …) Embedded processor

Process Variables (machine mode, beam mode, …) Process Variables (beam position, …) Embedded processor running v. Xworks/EPICS BPM Module PUE signals A/D FPGA 1 sec event Beam Laser permit pretrigger x 4 or x 8 9. 38 MHz RF reference

FPGA board control panel

FPGA board control panel

spectral content of simulated beam loss

spectral content of simulated beam loss

Next slide is zoom on this

Next slide is zoom on this

FPGA-based beam loss measurement (S/N ~same for DSA and FPGA) 1 u. A-sec loss

FPGA-based beam loss measurement (S/N ~same for DSA and FPGA) 1 u. A-sec loss signal no loss signal 0 1 2 3 4 5 6 Time [minutes] 7 8 9 10

Comments, conclusions • Consider toroid upgrades for RHIC – – • • • Present

Comments, conclusions • Consider toroid upgrades for RHIC – – • • • Present DCCTs are 5 u. A/rt. Hz? Going to 0. 1 u. A/rt. Hz would give much more sensitive diagnostic for machine tuning - this is important! Implementation of DI measurement on FPGA board was straightforward ~2 man-weeks of Joe Mead, 1 man-week of Pete Cameron Paradox? need to understand vector averaging, … see simulation Where from here? Hold off on further – Basic system functionality and spec demonstrated – I’m on travel for most of the coming month, then Run 8 DI development until next spring? – Priority shift to BPM electronics • BPM system – – Libera demo box due in any day now (after 3 months of trying to get it) I’m at ITech (Slovenia) next week to work out details of Libera in ERL Commercial vendor (the major supplier of demo boards) exploring design and fab of COTS FPGA board to our spec (~$1 K vs ~$10 K or more for Libera box, and much simpler) Joe Mead is fabbing 4 ch fast digitizer mezzanine for ML 403

Suggestions for upcoming meeting agendas • • Sep 17 th – presentation and discussion

Suggestions for upcoming meeting agendas • • Sep 17 th – presentation and discussion of DCCT and differential current status Sep 24 th– presentation and discussion of Profile status Oct 1 st – presentation and discussion of BPM status Oct 8 th – Scrapers and collimators