ECM 586 Special Topics in Embedded Systems Lecture

ECM 586 Special Topics in Embedded Systems Lecture 2. General-Purpose Computer Systems Prof. Taeweon Suh Computer Science Education Korea University

A General Purpose Computer System CPU Main Memory (DDR 2) FSB (Front-Side Bus) North Bridge DMI (Direct Media I/F) 2 South Bridge Korea Univ

x 86 -based General-Purpose Computer System CPU Main Memory (DDR 2) FSB (Front-Side Bus) Graphics card North Bridge South Bridge Hard disk USB BIOS ROM PCIe card 3 Korea Univ

Present and Near Future and More… • • Core i 7–based Systems Core 2 Duo –based Systems CPU FSB (Front-Side Bus) Main Memory (DDR 2) North Bridge DMI (Direct Media I/F) Main Memory (DDR 3) Quickpath (Intel) or Hypertransport (AMD) South Bridge DMI (Direct Media I/F) 4 South Bridge Korea Univ

x 86 History (as of 2008) 5 Korea Univ

x 86 History (Cont. ) 4 -bit 32 -bit (i 586) 8 -bit 32 -bit (i 386) 16 -bit 32 -bit (i 686) 64 -bit (x 86_64) 2009 Core i 7 6 Korea Univ

CPU • Intel takes about 80% of the PC market and AMD takes about 20% § Apple also introduced Intel-based Mac • What is x 86? § Generic term referring to processors from Intel, AMD and VIA § Derived from the model numbers of the first few generations of processors: • 8086, 80286, 80386, 80486 x 86 § Now it generally refers to processors from Intel, AMD, and VIA • x 86 -16: 16 -bit processor • x 86 -32 (aka IA 32): 32 -bit processor • x 86 -64: 64 -bit processor 7 * IA: Intel Architecture Korea Univ

Chipset • We call North and South Bridges as Chipset • Chipset has many PCIe devices inside • North Bridge • South Bridge § Memory controller § PCI express ports to connect Graphics card § http: //www. intel. com/Assets/PDF/datasheet/316966. pdf § HDD (Hard-disk) controller § USB controller § Various peripherals connected • Keyboard, mouse, timer etc § PCI express ports § http: //www. intel. com/Assets/PDF/datasheet/316972. pdf • Note that the landscape is being changed! § For example, memory controller is integrated into CPU 8 Korea Univ

PCI, PCI Express Devices • PCI (Peripheral Component Interconnect) • PCIe (PCI Express) § Computer bus connecting all the peripheral devices to the computer motherboard § Replaced PCI in 2004 § Point-to-point connection PCI express slots PCI slot PCI express slot x 16 http: //www. pcisig. com/specifications/pciexpress/ 9 Korea Univ

General Purpose Computer System Example PCI express slot 10 Korea Univ

Another General Purpose Computer System Example 11 Korea Univ

General Purpose Computer System in terms of PCIe North Bridge South Bridge 12 Korea Univ

Software Stack Applications (MS-office, Google Earth…) API (Application Program I/F) Operating System (Linux, Vista, Mac OS …) BIOS provides common I/Fs BIOS (AMI, Phoenix Technologies …) Computer Hardware (CPU, Chipset, PCIe cards. . . ) 13 Korea Univ

How the General Purpose Computer System Works? • x 86 -based system starts to execute from the reset address 0 x. FFFF_FFF 0 § The first instruction is “jmp xxx” off from BIOS ROM • BIOS (Basic Input/Output System) § Detect and initialize all the devices (including PCI devices via PCI enumeration) on the system § Provide common interfaces to OS § Hand over the control to OS • OS § Manage the system resources including main memory • Control and coordinate the use of the hardware among various application programs for the various users § Provide APIs for system and application programming 14 Korea Univ

So… What? • How is it different from embedded systems? § General-purpose computer systems provide programmability to end-users • You can do any kinds of programming on your PC § C, C++, C#, Java etc § General-purpose systems should provide backward compatibility • A new system should be able to run legacy software, which could be in the form of binaries with no source codes written 30 years ago § So, general purpose computer system becomes messy and complicated, still containing all legacy hardware functionalities 15 Korea Univ

x 86 Operation Modes • Real Mode (= real address mode) § Programming environment of the 8086 processor § 8086 is a 16 -bit processor from Intel • Protected Mode § Native state of the 32 -bit Intel processor • For example, Windows is running in protected mode § 32 -bit mode • IA-32 e mode (64 -bit mode) § There are 2 sub modes • Compatibility mode • 64 -bit mode 16 Korea Univ

Registers in 8086 • Registers inside the 8086 § 16 -bit segment registers • CS, DS, SS, ES § General-purpose registers • all 16 -bits • AX, BX, CX, DX, SP, BP, SI, DI • Registers in x 86 -32 17 Korea Univ

Real Mode Addressing • In real mode (8086), general purpose registers are all 16 -bit wide • Real model § Segment registers specify the base address of each segment § Segment registers • • CS: Code Segment -> used to store instructions DS: Data Segment -> used to store data SS: Stack Segment -> stack ES: Extra Segment -> could be used to store more data § Addressing method • Segment << 4 + offset = physical address • Example: mov ax, 2000 h mov ds, ax Data segment starts from 20000 h (2000 h << 4) 18 Korea Univ

Data Segment in Real Mode • Memory addressing in real mode (8086) 1 MB Main Memory mov ax, 2000 h mov ds, ax mov al, [100 h] offset DS 0 x. FFFFF 20100 h 20000 h = 2000 h << 4 2000 h 0 x 0 19 Korea Univ

A 20 M • 8088/8086 allowed only 1 MB memory access since they have only 20 -bit physical address lines § 220 = 1 MB • Memory is accessed with segment: offset in 8086/8088 (still the same though) § What if CS=0 x. FFFF, IP=0 x 0020? • CS << 4 + IP = 0 x 100010 • But, we have only 20 address lines. So, 8088 ends up accessing 0 x 00010 ignoring the “ 1” in A 21 • Some (weird? ) programmers took advantage of this mechanism 20 Korea Univ

A 20 M (Cont) • How about now? § Your Core 2 Duo has 48 -bit physical address lines § What happens if there is no protection in the previous case • Processor will access 0 x 100010, breaking the legacy code § So, x 86 provides a mechanism called A 20 M (A 20 Mask) to make it compatible with the old generations 21 Korea Univ

A 20 M (Cont) 22 Korea Univ

Another Example • Protected mode addressing (32 -bit) § As application programs become larger, 1 MB main memory is too small § Intel introduced protected mode to address a larger memory (up to 4 GB) § But, Intel still wants to use 16 -bit segment registers for the backward compatability § How to access a 4 GB space with a 16 -bit register? 23 Korea Univ

Protected Mode Addressing 15 3 Segment Selector Index 2 T I 10 R P L TI = 1 TI = 0 GDT LDT Segment Descriptor Visible to software Hardware Inside the CPU (Registers) Segment Descriptor Invisible to software 31 0 19 Base 0 Limit Access info 24 Main memory Segment Descriptor Segment Descriptor Korea Univ

Segment Descriptor Format • Software (OS) creates descriptor tables (GDT, LDT) 25 Korea Univ

Address Translation in Protected Mode 26 Korea Univ

Yet Another Example • 8259 Interrupt Controller CPU Main Memory (DDR) FSB (Front-Side Bus) Still in South Bridge North Bridge 82 C 59 A (Master) DMI (Direct Media I/F) South Bridge 82 C 59 A (Slave) IR 0 IR 1 IR 2 IR 3 IR 4 IR 5 IR 6 IR 7 INTR IR 0 IR 1 IR 2 IR 3 IR 4 IR 5 IR 6 IR 7 CPU (8086) INTR INTA 27 Korea Univ