CS 161 Design and Architecture of Computer Systems

CS 161 Design and Architecture of Computer Systems Lecture 1 Instructor: L. N. Bhuyan (http: //www. cs. ucr. edu/~bhuyan) Adapted from notes by Dave Patterson (http: //www. cs. berkeley. edu/~patterson)

Course Administration ° Instructor: Laxmi N. Bhuyan (bhuyan@cs. ucr. edu) (http: //www. ucr. edu/~bhuyan) Tel: (951)827 -2244 351 Engg. 2 Office Hours: W 3 -4. 30 or by appt ° TA: E-mail: rhalstea@cs. ucr. edu Office Hrs: EBU 2 Room 110

Course Administration ° Text: Computer Organization and Design: The Hardware/Software Interface, Patterson and Hennessy, 4 th Ed. ° Prerequisite: Assembly Language (CS 061) and Digital system (CS 120 B) ° Grade breakdown • • Test 1 (Chapters 1 and 2) Test 2 (Chapter 4) Test 3 (Chapters 5 -7) Homework Assignments ° Penalty for late homework ° Grades based on curve 25% 30% 25% 20%

Historical Perspective ° Decade of 70’s (Microprocessors) Programmable Controllers Single Chip Microprocessors Personal Computers ° Decade of 80’s (RISC Architecture) Instruction Pipelining Fast Cache Memories Compiler Optimizations ° Decade of 90’s (Instruction Level Parallelism) Superscalar Processors Aggressive Code Scheduling Low Cost Supercomputing Out of Order Execution KILLER MICROS

Performance Growth In Perspective ° Doubling every 18 months since 1982 Cars travel at 11, 000 mph; get 4000 miles/gal Air Travel LA-NY in 90 seconds (Mach 200) Wheat yield 20, 000 bushels per acre ° Doubling every 24 months since 1970 Cars travel at 200, 000 mph; get 50, 000 miles/gal Air Travel LA-NY in 6 seconds (Mach 3, 000) Wheat yield 300, 000 bushels per acre

Technology => dramatic change ° Processor • logic capacity: about 30% per year • clock rate: about 20% per year ° Memory • DRAM capacity: about 60% per year (4 x every 3 years) • Memory speed: about 10% per year • Cost per bit: improves about 25% per year ° Disk • capacity: about 60% per year

Technology => Dramatic Change ° Processor • 2 X in performance every 1. 5 years; 1000 X performance in last decade ° Main Memory • DRAM capacity: 2 x / 2 years; 1000 X size in last decade • Cost/bit: improves about 25% per year ° Disk • capacity: > 2 X in size every 1. 5 years • Cost/bit: improves about 60% per year • 120 X size in last decade

Trends: Microprocessor Capacity 100, 000 Alpha 21264: 15 million Pentium Pro: 5. 5 million Power. PC 620: 6. 9 million Alpha 21164: 9. 3 million Sparc Ultra: 5. 2 million 10, 000 transistors Moore’s Law Pentium i 80486 1, 000 i 80386 i 80286 100, 000 2 X transistors/Chip Every 1. 5 years i 8086 10, 000 i 8080 Called “Moore’s Law”: i 4004 1000 1975 1980 1985 Year 1990 1995 2000

Trends: Memory Capacity (1 Chip DRAM) ° DRAM: Dynamic Random Access Memory • where programs live while running; volatile (contrast with disk memory) 1, 000, 000 size(Megabit) 0. 0625 0. 25 1 4 16 64 256 100, 000 10, 000 Bits year 1980 1983 1986 1989 1992 1996 2000 1, 000 100, 000 10, 000 Now 1. 4 X/yr, or doubling every 2 years 1, 000 1975 1980 1985 1990 Year 1995 2000

Trends: Processor Performance 1100 1000 900 800 700 600 500 400 300 200 100 0 DEC Alpha 21264/600 Intel VC 820 (Pentium III, 1. 0 GHz) 1. 54 x/year DEC Alpha 5/500 DEC HP IBM AXP/ Sun MIPS RS/ 9000/ 500 -4/ M M/ 6000 750 260 2000 120 DEC Alpha 5/300 DEC Alpha 4/266 IBM POWER 100 87 88 89 90 91 92 93 94 95 96 97

Why Study Computer Architecture ° Aren’t they fast enough already? • Are they? • Fast enough to do everything we will EVER want? AI, protein sequencing, graphics • Is speed the only goal? Power: heat dissipation + battery life Cost Reliability Etc. Answer #1: requirements are always changing Answer #2: technology playing field is always changing

Classes of Computers ° High performance (supercomputers) • Supercomputers – Cray T-90 • Massively parallel computers – Cray T 3 E ° Balanced cost/performance • Workstations – SPARCstations • Servers – SGI Origin, Ultra. SPARC • High-end PCs – Pentium quads ° Low cost/power • Low-end PCs, laptops, PDAs – mobile Pentiums

What is *Computer Architecture* Computer Architecture = Instruction Set Architecture + Organization + Hardware + …

What is “Computer Architecture”? Application (Netscape) Software Hardware Operating System Compiler (Unix; Assembler Windows 9 x) Processor Memory I/O system Instruction Set Architecture Datapath & Control Digital Design Circuit Design transistors, IC layout CS 161 ° Key Idea: levels of abstraction • hide unnecessary implementation details • helps us cope with enormous complexity of real systems

What is “Computer Architecture”? ° Computer Architecture = Instruction Set Architecture (ISA) the one “true” language of a machine boundary between hardware and software the hardware’s specification; defines “what” a machine does; + Machine Organization the “guts” of the machine; “how” the hardware works; the implementation; must obey the ISA abstraction ° We will explore both, and more!

Forces on Computer Architecture Technology Programming Languages Applications Computer Architecture Operating Systems Compiler

Forces Acting on Computer Architecture ° R-a-p-i-d Improvement in Implementation Technology: • IC: integrated circuit; invented 1959 • SSI MSI LSI VLSI: dramatic growth in number transistors/chip ability to create more (and bigger) FUs per processor; bigger memory more sophisticated applications, larger databases ° Tomorrow’s Science Fiction: ubiquitous computing: computers embedded everywhere ° New Languages: Java, C++. . .

Machine Organization: 5 classic components of any computer Personal Computer Processor (CPU) (active) Control (“brain”) Datapath (“brawn”) Memory (passive) (where programs, & data live when running) Devices Input Output Keyboard, Mouse Disk (where programs, & data live when not running) Display, Printer The components of every computer, past and present, belong to one of these five categories

Machine Organization Perspective ° Capabilities & performance characteristics of principal Functional Units (FUs) of the CPU ° Ways in which these components are interconnected to realize the ISA ° Information flows between components ° How such information flow is controlled ° Levels of Machine Description • Register Transfer Level (RTL) • Gate Level (Digital Design)

CS 161: Course Content Computer Architecture and Engineering Instruction Set Design Computer Organization Interfaces Hardware Components Compiler/System View Logic Designer’s View “Building Architect” “Construction Engineer”

von Neumann Computer ° 1944: The First Electronic Computer ENIAC at IAS, Princeton Univ. (18, 000 vacuum tubes) ° Stored-Program Concept – Storing programs as numbers – by John von Neumann – Eckert and Mauchly worked in engineering the concept. ° Idea: A program is written as a sequence of instructions, represented by binary numbers. The instructions are stored in the memory just as data. They are read one by one, decoded and then executed by the CPU.

Execution Cycle Instruction Obtain instruction from program storage Fetch Instruction Determine required actions and instruction size Decode Operand Locate and obtain operand data Fetch Execute Result Compute result value or status Deposit results in storage for later use Store Next Instruction Determine successor instruction

The Instruction Set: a Critical Interface The actual programmer visible instruction set software instruction set hardware

Instruction-Set Processor Design ° Architecture (ISA) programmer/compiler view • “functional appearance to its immediate user/system programmer” • Opcodes, addressing modes, architected registers, IEEE floating point ° Implementation (µarchitecture) processor designer/view • “logical structure or organization that performs the architecture” • Pipelining, functional units, caches, physical registers ° Realization (chip) chip/system designer view • “physical structure that embodies the implementation” • Gates, cells, transistors, wires

Relationship Between the Three Aspects ° Processors having identical ISA may be very different in organization. • e. g. NEC VR 5432 and NEC VR 4122 ° Processors with identical ISA and nearly identical organization are still not nearly identical. • e. g. Pentium II and Celeron are nearly identical but differ at clock rates and memory systems ØArchitecture covers all three aspects.