MSI Devices M Mano C Kime Logic and
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MSI Devices M. Mano & C. Kime: Logic and Computer Design Fundamentals (Chapter 5) Dr. Costas Kyriacou and Dr. Konstantinos Tatas ACOE 161 - Digital Logic for Computers - Frederick University
MSI Devices • Medium Scale Integration (MSI) devices are digital devices that are build using a few tens to hundreds of logic gates. • MSI devices are used as discrete devices packed in a single Integrated Circuit (IC), or as building blocks for other, more complex devices such as memory devices or microprocessors. • Some typical MSI devices are the following: – Encoders and Decoders – Multiplexers and Demultiplexers – Full Adders – Latches and flip flops – Registers and Counters ACOE 161 - Digital Logic for Computers - Frederick University
Examples of MSI Devices Decimal to BCD Encoder 4 -to-1 Multiplexer BCD to Decimal Decoder ACOE 161 - Digital Logic for Computers - Frederick University
Decoders • A decoder is a combinational digital circuit with a number of inputs ‘n’ and a number of outputs ‘m’, where m= 2 n • Only one of the outputs is enabled at a time. The output enabled is the one specified by the binary number formed at the inputs of the decoder. • On the circuit below, the inputs of the decoder are connected on three switches, forming the number 5 [(101)2], thus only LED #5 will be ON ACOE 161 - Digital Logic for Computers - Frederick University
2 to 4 Line Decoder: ACOE 161 - Digital Logic for Computers - Frederick University
3 to 8 Line Decoder: ACOE 161 - Digital Logic for Computers - Frederick University
3 to 8 Line Decoder: (Implementation using two 2 -to-4 decoders) ACOE 161 - Digital Logic for Computers - Frederick University
3 to 8 Line Decoder: (Implementation using two 2 -to-4 decoders) ACOE 161 - Digital Logic for Computers - Frederick University
4 to 16 Line Decoder: (Implementation using four 2 -to-4 decoders) ACOE 161 - Digital Logic for Computers - Frederick University
ENCODERS • • • A decoder in general is a combinational digital circuit with a number of inputs ‘m’ and a number of outputs ‘n’, where n = log 2 m A binary encoder has precisely the opposite functionality of the binary decoder. A priority encoder is a special case of encoder used in computer interrupt mechanisms to specify which device requests service and prioritize interrupts that occur at the same time I 3 I 2 I 1 I 0 O 1 O 0 V 0 0 X X 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 ACOE 161 - Digital Logic for Computers - Frederick University 10
Multiplexers • A multiplexer is a device that has a number of data inputs “m”, and number of control inputs “n” and one output, such that m=2 n. The output has always the same value as the data input specified by the binary number at the control inputs. • The rotary switch (selector) shown in figure (a) below, is equivalent to a 4 -to-1 multiplexer. • The sliding switch shown in figure (b) below, is equivalent to an 8 -to-1 multiplexer. ACOE 161 - Digital Logic for Computers - Frederick University
Internal structure of a 2 -to-1 multiplexer. • The design of a 2 -to-1 multiplexer is shown below. • If S=0 then the output “Y” has the same value as the input “I 0” • If S=1 then the output “Y” has the same value as the input “I 1” ACOE 161 - Digital Logic for Computers - Frederick University
4 -to-1 Multiplexer (MUX) S S O 1 0 0 0 I 0 0 1 I 1 1 0 I 2 1 1 I 3 ACOE 161 - Digital Logic for Computers - Frederick University 13
1 -bit Full Adder ACOE 161 - Digital Logic for Computers - Frederick University 14
4 -bit Full Adder (Ripple-Carry Adder) • To obtain a 4 -bit full adder we cascade four 1 -bit full adders, by connecting the Carry Out bit of bit column M to the Carry In of the bit column M+1, as shown below. The Carry In of the Least Significant column is set to zero. • Example: Find the bit values of the outputs {Cout, S 3. . S 0} of the full adder shown below, if {A 3. . A 0 = 1011} and {B 3. . B 0 = 0111}. ACOE 161 - Digital Logic for Computers - Frederick University 15
Example • Design a 4 -bit adder/subtracter using Full-adders and gates. ACOE 161 - Digital Logic for Computers - Frederick University
Magnitude Comparator ACOE 161 - Digital Logic for Computers - Frederick University 17
Review questions • How many input/output signals are present in a – 5 -to-32 decoder? – 32 -to-1 MUX? – 32 -bit Ripple-Carry Adder (RCA)? • • How many 2 -to-1 MUXs are required to build a 32 -to-1 MUX? Design a logic unit with 2 data inputs (A, B), three select inputs (S 2, S 1, S 0) and the following specifications: S 2 S 1 S 0 O 0 0 0 A AND B 0 0 1 A OR B 0 1 0 A XOR B 0 1 1 A NAND B 1 0 0 A NOR B 1 0 1 A XNOR B 1 1 0 A΄ 1 1 1 B΄ ACOE 161 - Digital Logic for Computers - Frederick University 18
Review questions 2 • Use two 4 -to-1 MUXs to build a full adder • Implement the following Boolean algebra equation using only a single 8 -to-1 MUX: F(A, B, C, D) = Σ(0, 3, 5, 6, 8, 9, 14, 15) ACOE 161 - Digital Logic for Computers - Frederick University
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