L 5 Sequential Circuit Design Sequential Circuit Design

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L 5 – Sequential Circuit Design

L 5 – Sequential Circuit Design

Sequential Circuit Design o o o Mealy and Moore Characteristic Equations Design Procedure Example

Sequential Circuit Design o o o Mealy and Moore Characteristic Equations Design Procedure Example Sequential Problem – from specification to implementation Ref: Unit 14 of text 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 2

Types of State Machines o Mealy Machine o Characterized by – Outputs are a

Types of State Machines o Mealy Machine o Characterized by – Outputs are a function of both inputs and current state. 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 3

Types of State Machines o Moore Machine o Characterized by – Outputs are a

Types of State Machines o Moore Machine o Characterized by – Outputs are a function of the current state only. 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 4

Notes on Mealy and Moore o o Both Mealy and Moore machine implementation can

Notes on Mealy and Moore o o Both Mealy and Moore machine implementation can be implemented with any sequential element. Why choose one elements over another? n n Efficiency – The next state logic may differ significantly when using different F/F types. Efficiency of implementation is also drastically affected by choice of state assignment. 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 5

The characteristic equation o o The Characteristic Equation formally specifies the flip-flop’s next state

The characteristic equation o o The Characteristic Equation formally specifies the flip-flop’s next state as a function of its current state and inputs Q* means the next state value for the Q output of the F/F 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 6

Characteristic equations for F/Fs o Ref: Lect 1 o S-R Latch D F/F with

Characteristic equations for F/Fs o Ref: Lect 1 o S-R Latch D F/F with Enable J-K F/F T F/F o o o Q* = S + R’ Q Q* = D Q* = EN D + EN’ Q Q* = J Q’ + K’ Q Q* = Q’ o 9/2/2012 – ECE 3561 Lect 5 when T = 1 Copyright 2012 - Joanne De. Groat, ECE, OSU 7

Summary of the Design Procedure o o o 1. Given the problem statement, determine

Summary of the Design Procedure o o o 1. Given the problem statement, determine the relationship between input and output. Understand the specification and or problem statement. Resolve any questions. Then generate a state graph and/or state table. 2. Reduce the state table to the minimum number of states. 3. From the number of states determine the number of flipflops (m states n flip-flops where m <= 2 n) 4. Generate a transition table (current state – next state) 5. Use K-maps to derive flip-flop input equations. 6. Derive output functions and implement. 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 8

Example – problem statement o o o Sequential Code Converter (16. 3 example) Word

Example – problem statement o o o Sequential Code Converter (16. 3 example) Word description: Design a sequential circuit to convert BCD to excess 3 code. The inputs arrive sequentially, lsb first, i. e. serial input stream. After 4 inputs the circuit resets to the initial state ready for another group of 4 inputs. The excess 3 code is output serially at the same time. First question – is it possible to generate the output serially without delay? 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 9

Input – output table o Input BCD – Output excess 3 9/2/2012 – ECE

Input – output table o Input BCD – Output excess 3 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 10

Construct a state Graph o Walk through the sequences 9/2/2012 – ECE 3561 Lect

Construct a state Graph o Walk through the sequences 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 11

Build a state table o o From the State Graph can build the state

Build a state table o o From the State Graph can build the state table Note the relationship between the two 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 12

Then reduce the state table o o And just how is that done –

Then reduce the state table o o And just how is that done – (the coming attraction) How many flip-flops are needed? 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 13

What next? o o Choose state assignment Pick flip-flop of implementation – here D

What next? o o Choose state assignment Pick flip-flop of implementation – here D F/Fs 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 14

Next state logic o o Logic to generate the next state is generated Use

Next state logic o o Logic to generate the next state is generated Use K-maps 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 15

From there: implement the design o D flip-flop implementation 9/2/2012 – ECE 3561 Lect

From there: implement the design o D flip-flop implementation 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 16

Implementation with other F/Fs? o o Use the characteristic equation for generation of the

Implementation with other F/Fs? o o Use the characteristic equation for generation of the transition table. Say T flip-flops – example for T 1 n 000 100 (x=0) 101 (x=1) 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 17

Assignment o Work through the problem in this lecturee on your own and be

Assignment o Work through the problem in this lecturee on your own and be comfortable with them. 9/2/2012 – ECE 3561 Lect 5 Copyright 2012 - Joanne De. Groat, ECE, OSU 18

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