Digital Systems Lecture 8 Dr Ing Erwin Sitompul

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Digital Systems Lecture 8 Dr. -Ing. Erwin Sitompul President University http: //zitompul. wordpress. com

Digital Systems Lecture 8 Dr. -Ing. Erwin Sitompul President University http: //zitompul. wordpress. com 2 0 1 5 President University Erwin Sitompul Digital Systems 8/1

Lecture Digital Systems Section 11 Decoders and Encoders President University Erwin Sitompul Digital Systems

Lecture Digital Systems Section 11 Decoders and Encoders President University Erwin Sitompul Digital Systems 8/2

Lecture Digital Systems Binary Decoders n A binary decoder can be considered as a

Lecture Digital Systems Binary Decoders n A binary decoder can be considered as a black box with n input lines and 2 n output lines. n Only one output line is set to 1 for a given input. President University I 0 n inputs Enable Erwin Sitompul O 0 2 n outputs In – 1 E O 2 n – 1 Digital Systems 8/3

Lecture Digital Systems Binary Decoders n Binary decoders convert an n-bit input to a

Lecture Digital Systems Binary Decoders n Binary decoders convert an n-bit input to a single output. It uses its n-bit input to determine which of the 2 n outputs will be uniquely activated. n Binary decoders can be developed using AND or OR Gates. n Later on, binary decoders can be implemented in logic circuits. n The outputs of a decoder are minterms. That is why decoders are sometimes called as minterm generators. n We can easily use a decoder to implement any sum of minterms expression. n Note: A minterm is a Boolean expression resulting in 1 only for the output of a single row (in a truth table) or a single cell (in a Karnaugh map), and 0 s for all other row or cells, respectively. President University Erwin Sitompul Digital Systems 8/4

Lecture Digital Systems 2 -to-4 Binary Decoder n A circuit of 2 -to-4 binary

Lecture Digital Systems 2 -to-4 Binary Decoder n A circuit of 2 -to-4 binary decoder is shown below. Binary Decoder 2 inputs 4 outputs Enable n The truth table shows that for any given input combination, exactly one output will turn to 1. n The enable must be set to 1 to get an output. President University Erwin Sitompul Digital Systems 8/5

Lecture Digital Systems 3 -to-8 Binary Decoder n Try to understand the logic circuit

Lecture Digital Systems 3 -to-8 Binary Decoder n Try to understand the logic circuit of 3 -to-8 binary decoder below. Binary Decoder 3 inputs 8 outputs Enable President University Erwin Sitompul Digital Systems 8/6

Lecture Digital Systems 3 -to-8 Decoder Using Two 2 -to-4 Decoders X Y Z

Lecture Digital Systems 3 -to-8 Decoder Using Two 2 -to-4 Decoders X Y Z Enable I 0 I 1 E O 0 O 1 O 2 O 3 F 0 F 1 F 2 F 3 F 4 F 5 F 6 F 7 ● Using Enable signal, which is separated by a combinational circuit President University Erwin Sitompul Digital Systems 8/7

Lecture Digital Systems Implementing Functions Using Decoders n Any n-variable logic function can be

Lecture Digital Systems Implementing Functions Using Decoders n Any n-variable logic function can be implemented using a single n-to-2 n decoder, to generate the minterms (as given by the truth table or the Karnaugh map). n All the minterms are then summed up by an OR Gate. n Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2 n decoder and m OR Gates. n A decoder is suitable to use when a circuit has many outputs, where each output function is expressed with its minterms. President University Erwin Sitompul Digital Systems 8/8

Lecture Digital Systems Implementing Functions Using Decoders n Full Adder ● Each OR Gate

Lecture Digital Systems Implementing Functions Using Decoders n Full Adder ● Each OR Gate collects all minterms of respective output ● One OR Gate for every output President University Erwin Sitompul Digital Systems 8/9

Lecture Digital Systems Implementing Functions Using Decoders n Making a 4 -to-16 Decoder from

Lecture Digital Systems Implementing Functions Using Decoders n Making a 4 -to-16 Decoder from two 3 -to-8 Decoders n In this example, only one decoder can be active at a time. n X, Y, and Z effectively select the output line for a certain value of W. ● MSB W is used as Enable signal President University Erwin Sitompul Digital Systems 8/10

Lecture Digital Systems Implementing Functions Using Decoders n Making a Multiplexer from a 2

Lecture Digital Systems Implementing Functions Using Decoders n Making a Multiplexer from a 2 -to-4 Decoder F 0 F 1 X Y Enable = 1 I 0 I 1 E O 0 O 1 O 2 O 3 Output F 2 F 3 President University Erwin Sitompul Digital Systems 8/11

Lecture Digital Systems Binary Encoders n Binary encoders convert its 2 n inputs to

Lecture Digital Systems Binary Encoders n Binary encoders convert its 2 n inputs to an n-bit output. n Only one high value is presented as input. The result is a binary-encoded output of size n. n Binary encoders are useful for compressing data. President University I 0 2 n inputs Erwin Sitompul O 0 outputs n I 2 n – 1 On – 1 Digital Systems 8/12

Lecture Digital Systems 4 -to-2 Binary Encoder n In encoder circuit only one input

Lecture Digital Systems 4 -to-2 Binary Encoder n In encoder circuit only one input may be set high (1) at a certain time. n The output is a 2 -bit number. I 3 I 2 I 1 I 0 Y 1 Y 0 I 0 0 1 1 I 1 0 0 0 0 1 I 2 I 3 President University Y 1 Erwin Sitompul Y 0 Digital Systems 8/13

Lecture Digital Systems 8 -to-3 Binary Encoder n In this encoder circuit, at any

Lecture Digital Systems 8 -to-3 Binary Encoder n In this encoder circuit, at any certain time, only one input line has the value of 1. n The output is binary digits of Y 2 Y 1 Y 0. n This circuit is also called octal-tobinary encoder. President University Erwin Sitompul Digital Systems 8/14

Lecture Digital Systems 4 -to-2 Priority Encoder n For some application, there can be

Lecture Digital Systems 4 -to-2 Priority Encoder n For some application, there can be more than one input line that have a value of 1. n One way to handle these inputs is to ignore the lower inputs and only process the highest input (‘priority input’). n This encoder has 4 input lines: I 3, I 2, I 1, and I 0. n I 3 has the highest priority, I 0 has the lowest priority. I 3 I 2 I 1 I 0 Y 1 Y 0 0 1 X 0 1 X X X 0 1 Y 1 I 2 ? I 1 Y 0 ● Draw the Karnaugh maps for both outputs Y 1 and Y 0. I 0 Y 1 = I 3’·I 2 + I 3 Y 0 = I 3’·I 2’·I 1 + I 3 President University Erwin Sitompul Digital Systems 8/15

Lecture Digital Systems 8 -to-3 Priority Encoder n The following is the truth table

Lecture Digital Systems 8 -to-3 Priority Encoder n The following is the truth table of an 8 -to-3 priority encoder. n X indicates don’t cares. President University Erwin Sitompul Digital Systems 8/16

Lecture Digital Systems 8 -to-3 Priority Encoder n As one alternative solution, we can

Lecture Digital Systems 8 -to-3 Priority Encoder n As one alternative solution, we can use a priority encoder that implements the following logic functions: H 0 = I 7’·I 6’·I 5’·I 4’·I 3’·I 2’·I 1’·I 0 H 1 = I 7’·I 6’·I 5’·I 4’·I 3’·I 2’·I 1 H 2 = I 7’. I 6’·I 4’·I 3’·I 2 H 3 = I 7’. I 6’·I 5’·I 4’·I 3 H 4 = I 7’·I 6’·I 5’·I 4 H 5 = I 7’·I 6’·I 5 H 6 = I 7’·I 6 H 7 = I 7 (Highest Priority) President University Erwin Sitompul Digital Systems 8/17

Lecture Digital Systems 8 -to-3 Priority Encoder n The overall circuit of the priority

Lecture Digital Systems 8 -to-3 Priority Encoder n The overall circuit of the priority encoder will be as shown below. n The equations that express the binary encoder are: Y 0 = I 1 + I 3 + I 5 + I 7 Y 1 = I 2 + I 3 + I 6 + I 7 Y 2 = I 4 + I 5 + I 6 + I 7 President University Erwin Sitompul Digital Systems 8/18

Lecture Digital Systems Design Exercise: 8 -to-3 Priority Encoder Design an 8 -to-3 priority

Lecture Digital Systems Design Exercise: 8 -to-3 Priority Encoder Design an 8 -to-3 priority encoder that will deliver only the lowest input and process it to becomes the output. President University Erwin Sitompul Digital Systems 8/19

Lecture Digital Systems Priority Encoder Navigation n One possible application of encoder is in

Lecture Digital Systems Priority Encoder Navigation n One possible application of encoder is in positional control as used on ships or robotics. n The angular position of a compass or the rotary position of a joint is converted into a digital code by a 8 -to-3 priority encoder. n An example of a simple 8 -position to 3 -bit output encoder is shown below. President University Erwin Sitompul Digital Systems 8/20

Lecture Digital Systems Homework 8 1. Sketch the output waveforms of a 8 -to-3

Lecture Digital Systems Homework 8 1. Sketch the output waveforms of a 8 -to-3 priority encoder based on the given waveforms below (left). 2. Using binary decoders and/or encoders introduced in this lecture, create a circuit that will be able to memorize the birth dates of 8 students, as shown in the table below (right). Input Output (Student ID) (Birth date) 1 16 2 23 3 05 1 4 14 0 5 17 6 03 7 09 8 27 I 0 = I 1 = I 2 = I 3 = I 4 = I 5 = 1 I 6 1 0 I 7 n Deadline: 25 November 2015. President University Erwin Sitompul Digital Systems 8/21