Chapter 4 Introduction to Computer Organization Images courtesy
































- Slides: 32
Chapter 4 Introduction to Computer Organization Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Chapter Outline • • • System Organization CPU Organization Memory Organization and Interfacing I/O Organization and Interfacing Relatively Simple Computer 8085 -based Computer Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Basic Computer Organization Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
System Components • • • CPU/Microprocessor Memory Subsystem I/O Subsystem Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
System Buses • • • Address Bus Data Bus Control Bus Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Instruction Cycle • • • Fetch Decode Execute Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Instruction Fetch Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Types of I/O Organization • Isolated I/O • Memory-mapped I/O Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
CPU Organization Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Types of Memory • • • Static RAM Dynamic RAM ROM PROM EEPROM Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Memory Chip Organization Linear Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Memory Chip Organization Two Dimensional Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Combining Memory Chips to Increase Word Size Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Combining Memory Chips to Increase Address Space Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Low-order Interleaving Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
von Neumann Architecture • Instructions and data mixed • Used in modern computers Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Harvard Architecture • Instructions and data separate • Used in low-level cache memory design Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Big Endian Data Organization • Most significant byte first Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Little Endian Data Organization • Least significant byte first Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Input Device Organization Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Output Device Organization Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Bidirectional I/O Device Organization Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
I/O Interface Enhancements • • • READY signal Interrupts DMA Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Relatively Simple Computer Specifications • • Relatively Simple CPU 8 K ROM starting at 0000 H 8 K RAM starting at 2000 H Memory-mapped, bidirectional I/O port at 8000 H Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Relatively Simple Computer Organization - CPU Details Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Relatively Simple Computer Organization - Memory Details Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Relatively Simple Computer Organization - Final Design Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
INCLUDE EXTERNAL ANIMATION FROM JAVA SIMULATOR HERE Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
8085 -based Computer Specifications • • • 2 K EPROM starting at 0000 H 256 bytes RAM starting at 2000 H Four 8 -bit I/O ports at 00 H, 01 H, 19 H, and 1 AH • One 6 -bit I/O port at 1 BH Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Demultiplexing the AD signals Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
8085 -based Computer Organization Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
Summary • • • Basic Computer Organization CPU Organization Memory Chip Internal Organization Memory Subsystem Organization I/O Port Organization and Interfacing Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001
































