System Verilog History n n Enhancement of Verilog

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System. Verilog

System. Verilog

History n n Enhancement of Verilog 2002 – accellera publishes System. Verilog 3. 0

History n n Enhancement of Verilog 2002 – accellera publishes System. Verilog 3. 0 2004 - accellera publishes System. Verilog 3. 1 a 2005 – IEEE standardizes System. Verilog

What’s in it n n Verilog Modeling: New constructs n Synthesizable n n Verification:

What’s in it n n Verilog Modeling: New constructs n Synthesizable n n Verification: Testbench automation n Assertions n

SV for Modeling n n n n Verilog Interfaces Data types: 2 and 4

SV for Modeling n n n n Verilog Interfaces Data types: 2 and 4 levels, int, shortint, longint, byte, logic, typedef 2 -state modeling Flow control mechanisms: Break, continue, return, … Casting And much more. . .

SV for Verification n n n n Generation: Constrained random generation Check: Assertions Coverage

SV for Verification n n n n Generation: Constrained random generation Check: Assertions Coverage Semaphores Test program blocks Classes Inheritance And much more …

Constrained Random Generation Within class n Fields should be declared as random class packet;

Constrained Random Generation Within class n Fields should be declared as random class packet; randc bit[7: 0] addr; rand bit[7: 0] data; constraint legal_pkt { addr == 2; } endclass n

Interface n n n Separate communication from functionality A bundle of wires that simplifies

Interface n n n Separate communication from functionality A bundle of wires that simplifies hierarchical connections The block ‘uses’ an interface

Available Tools n n n Training Consulting Simulators SVA packages Methodology n n Synopsis,

Available Tools n n n Training Consulting Simulators SVA packages Methodology n n Synopsis, Mentor, Cadence Everybody has something

So? n n n Good new capabilities Modeling and verification in same language Apparently

So? n n n Good new capabilities Modeling and verification in same language Apparently – all verification services n Suitable for designers? n n n Synthesizable Complicated to learn Immature tools Immature methodology No experience

Motivation Enhancement Motivation enhancement Motivation enhancement Motivation enhancementMotivation Enhancement Motivation enhancement Motivation enhancement Motivation enhancement
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Enhancement Framework Vgsh Ku Enhancement Framework The EnhancementEnhancement Framework Vgsh Ku Enhancement Framework The Enhancement
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