POWER PC Chao Han ELEC 6200 Computer Architecture

POWER PC Chao Han ELEC 6200 Computer Architecture Fall 08 ELEC 6200 -001: Han: Power. PC 1

Introduction Power. PC is a RISC architecture based on IBM's POWER (Performance Optimization With Enhanced RISC). � It was jointly designed by Apple, IBM, and Motorola by early 1990 s. � Aim was to form the basis of a new generation of highperformance low-cost products ranging from embedded controllers to massively parallel supercomputers. � Power. PC 600 family, Power. PC 700 family, Power. PC 900 family, Power. PC 400. � Fall 08 ELEC 6200 -001: Han: Power. PC 2

Power. PC 601 Architecture Fall 08 ELEC 6200 -001: Han: Power. PC 3

Pipeline Structure Fall 08 ELEC 6200 -001: Han: Power. PC 4

Instruction Queue and Dispatch Logic It is Fed by eight-word bus from the cache. During each cycle, the dispatch logic considers the bottom four entries of the instruction queue and dispatches up to three instructions. Fall 08 ELEC 6200 -001: Han: Power. PC 5

Branch Processing Unit Fall 08 ELEC 6200 -001: Han: Power. PC 6

Fixed-point execution unit Fall 08 ELEC 6200 -001: Han: Power. PC 7

Floating-point Execution Unit Supports IEEE-754 FP data types For both single and double-precision floating-point arithmetic operations. Fall 08 ELEC 6200 -001: Han: Power. PC 8

Cache Unit & Memory Management Unit 32 Kbytes � 8 -way associative � Unified (instruction and data) � Capable of performing a complete read-modifywrite every cycle � Performs the virtual to real address translation for load and store instructions Acts as a backup for instruction fetch address translations Provides support for segment oriented, page oriented and block oriented translations. Fall 08 ELEC 6200 -001: Han: Power. PC 9

Sequencer Unit It is an embedded support processor that assists the core CPU in handling many of the algorithmic functions of the Power. PC architecture. � It contains 1) 1 K entry microcode ROS (Read-Only-Storage) 2) 8 single word general purpose registers 3) 32 word Private RAM 4) control logic required to execute the robust 18 bit instruction set � Fall 08 ELEC 6200 -001: Han: Power. PC 10

COP Unit The Common On-chip Processor is the master control logic for the build-in self-test, debug and test features of the 601 chip. � It contains a linear feedback shift register (LFSR), a multiple input signature register (MISR) and the control logic required to sequence BIST operations. � It provides the capability to stop and start the internal clocks and to dump the state of all registers, RAMs and register files on the chip. � Fall 08 ELEC 6200 -001: Han: Power. PC 11

Power. PC 601 Fall 08 ELEC 6200 -001: Han: Power. PC 12

References http: //www. kirps. com/web/main/_blog/all/a-short-history-of-thepowerpc-as-a-desktop-processor. shtml � Michael K. Becker, Michael S. Allen, Charles R. Moore, John S. Muhich, David P. Tuttle, "The Power PC 601 Microprocessor, " IEEE Micro, vol. 13, no. 5, pp. 54 -68, Sep/Oct, 1993 � http: //ieeexplore. ieee. org/search/wrapper. jsp? arnumber=238002 � Charles R. Moore, “The Power. PC 601 Microprocessor”, Compcon 1993 http: //zmoore. net/PPC 601%20 Compcon 93. pdf Fall 08 ELEC 6200 -001: Han: Power. PC 13