On time resolution in 130 nm technology Sorin

On time resolution in 130 nm technology Sorin Martoiu, P 326 Meeting, CERN

Outline • TOPIX 0. 13 um • • cell schematic measurements time resolution measurement… substrate noise • CFD design • Conclusions 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 2

TOPIX cell • Psupply < 30 u. W • Area = 50 x 50 um 2 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 3

TOPIX cell • Psupply < 30 u. W • Area = 50 x 50 um 2 • Linear TOT measure • Feedback capacitor discharged at input node Þ works also if output is saturated Þ large dynamic range 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 4

Measurements 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 5

discrete attenuator response (tatt) 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 6

• leading edge t 0 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 7

• t 0 – tatt • why does it turn up? • (limited discriminator slew rate, …) 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 8

Parameterization • Linear approximation: t 0 ~ 1/Amplitude • Exact formula is more complicated • We use 1/Amplitude 2 for beginning… 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 9

Time Walk • time walk corrected using TOT measure • time walk 0. 1 – 1 range • must find better parameterization! 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 10

Time Walk - Higher Current 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 11

Time Walk – Better Parameterization • <100 ps for high amplitudes • must account for TOT non-linearity 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 12

Time walk - Discussion • In principle time-walk can be fully eliminated if … – we use the exact parameterization – have enough calibration events Þdata overhead – response of the electronics is highly linear Þcorrection possible (in principle) on-chip 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 13

• leading edge jitter 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 14

• TOT jitter influence over time resolution • good TOT relative accuracy at high amplitude (20 ns/4 us) 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 15

Overall Jitter • dominated by the leading edge jitter • depends weakly on the parameterization • difficult to measure at low signal level 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 16

Substrate noise • high capacitive load on digital circuit 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 17

Substrate noise 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 18

Current-mode CFD + Bandwidth + Dynamic range - Linearity Iin Iout Active delay element: - long channel MOS - current noise -> low gm -> strong inversion - PMOS as delay element (no ELT)-> high Vov -> lower performance/higher design effort 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 19

Current-mode CFD • Case 1 (slow - low power (50 u. A)) – Jitter = 175 ps – Timewalk = 200 ps (sigma-MC) • Case 2 (fast - higher power (>200 u. A)) – Jitter = 230 ps – Timewalk = 180 ps (sigma-MC) • Work in progress… 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 20

Voltage-mode CFD • Distributed RC CFD filter (4 poles) • Cascaded discriminator 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 21

Voltage-mode CFD Ideal Case • Fast Discriminator (500 MHz) – Jitter = 50 ps – Time walk = 225 ps (Voffset = 1 m. V) • Slow Discriminator (150 MHz) – Jitter = 30 ps – Timewalk = 360 ps 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 22

VM CFD Design • Vos < 1 m. V AMOS = 300 um 2 Cin = 1 p. F !!! • Low limit for Iss: Slew_rate*CL = 40 V/us*1 f. C = 40 u. A (low limit for last stage) ÞFast Discriminator ÞOffset compensation (DAC/static) 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 23

Static Offset Compensation I 1 I 2 • current is injected into the CFD filter resistive ladder • I 1 – I 2 ~ Voutdiff (at low frequency) • feedback cuts low frequency gain => reduces noise (1/f noise) 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 24

VM CFD Design Real Case • Case 1 (2 stages Isupply=80 u. A) – Jitter = 100 ps – Timewalk = 250 ps (1 m. V offset) – Discriminator offset +/- 20 m. V => 6 bit DAC • Case 2 (2 stages + static compensation Isupply = 140 u. A) – Jitter = 90 ps – Timewalk = 150 ps (max) • Case 3 (3 stages + static compensation Isupply = 180 u. A) – Jitter = 87 ps – Timewalk = 40 … 110 ps (slew rate limitation) • Area budget < 70 x 70 um 2 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 25

Conclusions • TOT is promising if gain can be increased with constant noise level, but… – crosstalk when preamplifier is saturated – high deadtime – more data/event • CFD performs better (simulation), but… – needs good linearity (signal shape) – less dynamic range • 0. 13 um technology – good model-to-hardware match (except small caps!!) – careful to parasitics (but parasitics extraction is fair) – substrate noise • If submission in august we can put something on silicon 9/9/2020 Sorin Martoiu, P 326 Meeting, CERN 26