1 Henry Selvaraj Henry Selvaraj Henry Selvaraj Henry

1 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Xilinx We will be studying the architecture of XC 3000. • It is fabricated in CMOS technology • The chip is frequently referred to as Xilinx Logic Cell Array (LCA) • The first XC 2000 series LCA was released in 1983. Henry Selvaraj

2 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj

3 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; NAND Henry Selvaraj; (two-input gates)Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; LCA 3000 Series • The number of equivalent gates is 2000 -9000 • Number of Configurable Logic Blocks (CLBs) is 64 -320 • Number of inputs to a CLB: 5 • Flip-flops in a CLB: 2 • I/O Blocks (IOBs): 64 - 144 Henry Selvaraj

4 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; XC 3000 LCA architecture The LCA architecture includes a fixed array of CLBs, input/output blocks (IOBs). The blocks can be connected by horizontal and vertical wire segments joined by the switch matrices. The programming elements inside the switch matrices establish the connections between the wire segments. Henry Selvaraj

5 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; User logic is implemented by configuring the LCA’s components. The Xilinx chip is reprogrammable since its programmability is based on the SRAM technolgy. Henry Selvaraj

6 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Configurable Logic Block (CLB) The CLB of the 3000 series consists of two flip flops, a five-input look-up table (LUT) and many multiplexers (not accessible to the user). The LUT is a block of 32 -bit RAM cells. The LUT can realize any function of five variables or any two functions of four variables. Henry Selvaraj

7 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj

8 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; XC 3000 CLB contd. . . • The CLB outputs x and y may be connected to the outputs of the LUT (or the function generator) directly or through flip-flops. • As the functions are implemented using a memory based LUT, propagation delay through the CLB is independent of the logic implemented. Henry Selvaraj

9 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; XC 3000 CLB contd. . . • The flip-flops can be reset but not set • all flip-flops are automatically cleared after configuration • when ec (enable clock) is low, the flip-flops are forced to maintain their current values, ignoring the clock. Henry Selvaraj

XC 4000 CLB 10 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj

11 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; • IOB provides interface LCA and. Henry the Selvaraj; external world. Henry Selvaraj; Henry between Selvaraj; Henry Selvaraj; Henry Selvaraj; • There is Henry one Selvaraj; IOB for every programmable pin. Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; • IOB can serve as input, output or tristate bidirectional path. Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; • Input/output signals. Henry can. Selvaraj; be registered or directly connected Henry Selvaraj; Henry Selvaraj; with Henry skew Selvaraj; control Henry Selvaraj; Henryas Selvaraj; • the. Selvaraj; output buffer is. Henry provided as well Henry Selvaraj; Henry Selvaraj; tristate control Henry Selvaraj; Henry Selvaraj; Henryor Selvaraj; Henry Selvaraj; • XC 3000 IOBSelvaraj; can sink source 4 Selvaraj; m. A of. Henry current Henry Selvaraj; Henry Selvaraj; Henry 12 Selvaraj; 2 m. A Henry Selvaraj; • XC 4000 IOBSelvaraj; can sink m. A Henry or source Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; IOB Henry Selvaraj

12 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; • It Selvaraj; consists of. Selvaraj; two layers of metal segments, programmable Henry Selvaraj; Henry Selvaraj; interconnect points. Henry (PIPs) and. Henry switch boxes. Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; • PIP consists of a pass transistor that is controlled by a Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; RAM cell. Dropping a ‘ 1’ into. Henry the Selvaraj; cell establishes a Henry Selvaraj; Henry Selvaraj; connection between two points. Henry Selvaraj; Henry Selvaraj; Henry of Selvaraj; Henry Selvaraj; • Three kinds resources: long lines, short lines and general Henry Selvaraj; Henry Selvaraj; purpose interconnects Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Programmable Interconnects Henry Selvaraj

13 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henryvertical Selvaraj; Henry run Selvaraj; • Long lines: and. Selvaraj; horizontal long lines the. Henry entire Henry Selvaraj; Henry Selvaraj; height and width of. Henry the Selvaraj; interconnect area. Henry They are used to Henry Selvaraj; Henry Selvaraj; signals Henry Selvaraj; carry high-fanout or signals that need to travel long Henry Selvaraj; Henry Selvaraj; distance with. Selvaraj; low skew. The horizontal can be. Selvaraj; Henry Selvaraj; long Henrylines Selvaraj; Henry Selvaraj; Henrythe Selvaraj; Henry Selvaraj; connected to Selvaraj; the tristate buffers. This allows formation Henry Selvaraj; Henry Selvaraj; of. Selvaraj; buses, Henry multiplexers wired AND functions. Henry Selvaraj; Henryand Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; • Short lines: connecting adjacent CLBs. Henry and. Selvaraj; IOBs; Henry used Henry Selvaraj; Henryfor Selvaraj; Henry Selvaraj; and Henry Selvaraj; for. Selvaraj; short. Henry distance low-delay communication. Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Programmable Interconnects contd. . Henry Selvaraj

14 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; • General purpose interconnect consists of a network of Henry Selvaraj; Henry Selvaraj; switching matrices and. Selvaraj; wire segments to. Henry facilitate Henry Selvaraj; general Henry Selvaraj; Henry Selvaraj; network branching and routing. In XC 3000 series it Henry Selvaraj; Henry Selvaraj; consists of 5 Selvaraj; horizontal and 5 Henry vertical lines located Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; between the rows and columns of CLBs. At the Henry Selvaraj; Henry Selvaraj; intersections there Henry is a switch box Selvaraj; called. Henry a switching Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; matrix. Henry Selvaraj; Henry Selvaraj; Henryconnections Selvaraj; Henry Selvaraj; • ASelvaraj; switching matrix. Henry can. Selvaraj; establish in twenty Henry Selvaraj; Henry Selvaraj; different ways (4 or 5 or 6). Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Programmable Interconnects contd. . Henry Selvaraj

15 Henry Selvaraj; Henry Selvaraj; XC 3000 Interconnects Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj

16 Henry Selvaraj; Henry Selvaraj; Henry Possible Selvaraj; Henry Selvaraj; switch box connectivities Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj

17 Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Actel: ACT 1 Logic module OHP fig. Henry Selvaraj

18 Homework: What. Henry is the FPGA in. Henry XSA 50 board? Henry Selvaraj; Henryused Selvaraj; Henry Selvaraj; Henry Selvaraj; Describe its architecture, logic capabilities and Henry Selvaraj; Henry Selvaraj; available for the user. Henry Selvaraj; Henryresources Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Due date: Sept. 22, 2003. Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj; Henry Selvaraj