Speculative Precomputation SP Delinquent loads cachemissing loads Speculative

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Speculative Precomputation (SP) – Κίνητρο § Delinquent loads: τα πιο «cache-missing» loads

Speculative Precomputation (SP) – Κίνητρο § Delinquent loads: τα πιο «cache-missing» loads

Speculative Precomputation (SP)

Speculative Precomputation (SP)

SP Performance § περισσότερα contexts → περισσότερα chaining triggers

SP Performance § περισσότερα contexts → περισσότερα chaining triggers

DSP Performance

DSP Performance

Performance of event-driven optimization

Performance of event-driven optimization

credits for slides: § D. Tullsen (University of California, San Diego) – ACACES summer

credits for slides: § D. Tullsen (University of California, San Diego) – ACACES summer school 2008

Software-based Helper Threading § [Collins 01] J. Collins, H. Wang, D. Tullsen, C. Hughes,

Software-based Helper Threading § [Collins 01] J. Collins, H. Wang, D. Tullsen, C. Hughes, Y. Lee, D. Lavery & J. Shen. Speculative Precomputation: Long-Range Prefetching of Delinquent Loads. 28 th Annual International Symposium on Computer Architecture (ISCA ’ 01). § [Kim 02] D. Kim & D. Yeung. Design and Evaluation of Compiler Algorithms for Pre-Execution. 10 th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS ’ 02). § [Kim 04] D. Kim, S. Liao, P. Wang, J. del Cuvillo, X. Tian, X. Zou, H. Wang, D. Yeung, M. Girkar & J. Shen. Physical Experimentation with Prefetching Helper Threads on Intel’s Hyper-Threaded Processors. 2 nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO ’ 04). § [Luk 01] C. Luk. Tolerating Memory Latency through Software-Controlled Pre-Execution in Simultaneous Multithreading Processors. 28 th Annual International Symposium on Computer Architecture (ISCA ’ 01). § [Song 05] Y. Song, S. Kalogeropoulos, P. Tirumalai. "Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors" (PACT ’ 05) § [Wang 04] T. Wang, F. Blagojevic & D. Nikolopoulos. Runtime Support for Integrating Precomputation and Thread-Level Parallelism on Simultaneous Multithreaded Processors. 7 th ACM SIGPLAN Workshop on Languages, Compilers, and Runtime Support for Scalable Systems (LCR ’ 04). § [Zhang 05] W. Zhang, B. Calder and D. Tullsen. An Event-Driven Multithreaded Dynamic Optimization Framework. 14 th International Conference on Parallel Architectures and Compilation Techniques (PACT ‘ 05)

Hardware-based Helper Threading § [Chappell 99] R. Chappell, J. Stark, S. Kim, S. Reinhardt

Hardware-based Helper Threading § [Chappell 99] R. Chappell, J. Stark, S. Kim, S. Reinhardt & Y. Patt. Simultaneous Subordinate Microthreading (SSMT). 26 th Annual International Symposium on Computer architecture (ISCA ’ 99). § [Collins 01] J. Collins, D. Tullsen, H. Wang, J. Shen. Dynamic Speculative Precomputation. 34 th annual ACM/IEEE international symposium on Microarchitecture (MICRO ‘ 01) § [Ibrahim 03] K. Ibrahim, G. Byrd, E. Rotenberg. Slipstream Execution Mode for CMP-Based Multiprocessors. (HPCA ’ 03) § [Roth 01] A. Roth & G. Sohi. Speculative Data-Driven Multithreading. 7 th International Symposium on High Performance Computer Architecture (HPCA ’ 01). § [Sundaramoorthy 00] K. Sundaramoorthy, Z. Purser & E. Rotenberg. Slipstream Processors: Improving both Performance and Fault Tolerance. 9 th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS ’ 00). § [Zilles 01] C. Zilles & G. Sohi. Execution-Based Prediction Using Speculative Slices. 28 th Annual International Symposium on Computer Architecture (ISCA ’ 01).

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