Load Sensors Acquisition System LSAS CNRAD irradiation test

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Load Sensors Acquisition System (LSAS) – CNRAD irradiation test (21. 09. 2012 – 3.

Load Sensors Acquisition System (LSAS) – CNRAD irradiation test (21. 09. 2012 – 3. 12. 2012) Mateusz Sosin BE/ABP/SU RADWG, 12. 09. 2013.

n n Load sensors under Low-Beta quadrupoles – short introduction Load Sensors Acquisition System

n n Load sensors under Low-Beta quadrupoles – short introduction Load Sensors Acquisition System (LSAS) – DUT description Radiation levels at LSAS equipment locations CNRAD tests Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Load sensors under Low-Beta quadrupoles Main application n Monitoring of Low. Beta jack load

Load sensors under Low-Beta quadrupoles Main application n Monitoring of Low. Beta jack load when adjusting (according to risk of lontact lost). System is not critical for the LHC operation ü Strain gauge (Wheatstone bridge) load sensor (HBM MPZ 1108010, sensor constant ~1. 3 m. V/V, Uexc = 5 V, 20 T range, typical bridge Uout → ~ -1. . 6. 5 m. V) ü DUT is an acquisition electronics crate, conditioning the load sensors signals and sending the measurement data via Word. FIP ü D U T n Device Under Test ü ü ü 12 input channels; Each channel input range ± 10 m. V (scaled to ± 15 V @ data output) AC excitation of sensors Single IP side (L or R) installation layout Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

DUT: Load Sensors Acquisition System (LSAS) n LSAS crate (load sensors signal conditioning by

DUT: Load Sensors Acquisition System (LSAS) n LSAS crate (load sensors signal conditioning by Analog Devices AD 7730 L) ü ü ü Based on existing „Survey Acquisition System (SAS)” used by BE-ABP-SU for alignment sensors measurements Fip. ADUC card for FIP communication and local connection by RS 232 link Self-diagnostic implemented LOAD SENSORS 12 CHANNEL INPUT STAGE → 2 PCB’s: - Upper board (6 CH AD 7730 L) - Main board (6 CH AD 7730 L + powering +control logic) CONN. TAPE FIP ADUC CARD Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

DUT: Load Sensors Acquisition System (LSAS) n AD 7730 L signal conditioner ü Analog

DUT: Load Sensors Acquisition System (LSAS) n AD 7730 L signal conditioner ü Analog Devices, CMOS, 24 -Bit Sigma-Delta, Bridge Transducer ADC for Load Cell Applications. Equipped in digital filters, internal calibration microcontroller. Contain ~24 B of RAM. ü Basic DSP abilities included (filters) ü The AD 7730 retains its ratiometric operation with reference voltage varying in sympathy with the analog input voltage (ADCOUT = (VIN/VREF) x Full-Scale x Scaling-Factor). Eliminate impact of excitation voltage change (cables resistances) ü AC excitation of the bridge addresses many of the concerns with thermocouple, offset and drift effects encountered in dc-excited applications Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

DUT: Load Sensors Acquisition System (LSAS) FIP ADUC CARD n CONN. TAPE LOAD SENSORS

DUT: Load Sensors Acquisition System (LSAS) FIP ADUC CARD n CONN. TAPE LOAD SENSORS 12 CHANNEL INPUT STAGE - 2 PCB-s Tested by A. Marin as part of Survey Acquisition System – SAS (EDMS 1062166) Semiconductors used for 12 -channel input stage (2 PCB-s) of LSAS: ü 12 x AD 7730 L –Bridge Transducer for Load Cell Applications. ü 12 x. MIC 4427 – Micrel, MOSFET driver – sensor supply polarization change in AC measurement mode (not tested) ü 1 x. CPLD XC 95288 XL – Xilinx CPLD, 288 macrocells – contains all board logic: AD 7730 L→ADUC 834 signal multiplexer, Fip. ADUC to ADUC 834 bus interface, LED driver (not tested) ü 1 x. ADUC 834 – Analog Devices, ’ 51 based MCU – board diagnostics, AD 7730 L initializing & data reading, sensor measurements conversion & averaging, Fip. ADUC communication (tested) ü 12 x. LED HLMP-1700 or HLMP-1790 (tested) POWER SUPPLY: ü 4 x rectifying diodes 50 WQ 03 FN (tested) ü 2 x IRF 6215 S MOSFET transistor (tested) ü 1 x LM 7805 – Linear voltage stabilizer (tested) ü 1 x LE 33 (not tested) Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Load Sensors Acquisition System (LSAS) – radiation levels at equipment location n Equipment locations:

Load Sensors Acquisition System (LSAS) – radiation levels at equipment location n Equipment locations: ü ü IP 1: US 15 IP 2: UA 23, UA 27 IP 8: UA 83, UA 87 IP 5: UJ 56 -> after LS 1 UL 55 n Equipment quantity: ü ü Each IP -> 2 LSAS crates LHC: 8 crates in total Radiation levels 2012 (according to: Radiation Levels around the LHC; P. Mala, M. Brugger, M. Calviani, A. Nordt ; ATS /Note/2013/032. US 15, UA 23, UA 27, UA 83, UA 87, UL 55 are considered as non-critical) ü ü Total Ioinizing Dose < 0. 1 Gy/year High Energy Hadron fluence < 1 x 107 cm-2 Radiation levels considered to tests → TID 100 Gy (according to: IRRADIATION D’UN CH SSIS SAS 1ÈRE GÉNÉNATION; A. Marin, EDMS 1062166 → SAS falirue at TID 98 Gy; 1 st. R 2 E RADIATION SCHOOL & WORKSHOP Divonne, June 2 nd/3 rd 2009; M. Brugger for the R 2 E Study Group) ü ü ü Total Ioinizing Dose UJ 56: 1 -10 Gy/year High Energy Hadron fluence UJ 56: 1 x 109 - 1 x 1010 cm-2 1 Me. V neutron equivalent UJ 56: 1 x 1010 - 1 x 1011 Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Load Sensors signal simulation – CNRAD measurements Mateusz Sosin n To simulate real sensor

Load Sensors signal simulation – CNRAD measurements Mateusz Sosin n To simulate real sensor connected to the input channel of LSAS crate – the special adapters enclosed in metal envelopes were prepared n The single adapter contained metalized-resistors circuit - representing Wheatstone bridge of original HBM MPZ 1108010 load sensor n Resistor resistances were selected to have different input value on each channel (within entire range of conditioner input channels) n Main purpose of the test was to check the stability of the sensors signal over the LSAS crate irradiation Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Supply voltages and currents – CNRAD measurements n IDIG Supply voltages measurement before and

Supply voltages and currents – CNRAD measurements n IDIG Supply voltages measurement before and after irradiation ü ü ü IANALOG n LSAS board logic powering, ADUC 834: +5 VL, XC 95288 : +3. 3 VL +5 VR (Fip. ADUC powering, main supply for LSAS board logic) AD 7730 L signal conditioners powering – digital and analog supply: +5 VD (DVdd), +5 VA (AVdd) Current monitoring for board logic and conditioners (IDIG, IANALOG) IDIG, IANALOG current measurements using shunt resistors (Rshunt(Q 1), Rshunt(Q 2)) and differential op-amp circuitry were LOST PROBABLY BECAUSE OF implememnted (conversion of IDIG, IANALOG FAULT DURING INSLATTATION IN to Fip. ADUC ADC voltage inputs). CNRAD. ü UNFORTUNATELY DETECTED AFTER IRRADIATION STARTED Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

LSAS installation – CNRAD measurements n The LSAS test crate was installed in TSG

LSAS installation – CNRAD measurements n The LSAS test crate was installed in TSG 45 – position 432 in order to reach TID of 100 Gy n LSAS crate data acquisition was realized by Front End Computer using 31. 5 k. Hz Word. FIP connection. Input channels measurements and diagnostic events were logged on PVSS server created for the test purposes n Mateusz Sosin In case of DUT functional interrupt – remote reset possibility by power supply OFF and ON was provided Research status of Low-Beta weighting system RADWG, 12. 09. 2013

LSAS – CNRAD measurements n n Irradiation started 21. 09. 2012. Data logging started

LSAS – CNRAD measurements n n Irradiation started 21. 09. 2012. Data logging started 24. 09. 2013. 30. 10. 2012 FIP communication with LSAS crate was lost after TID of 93 Gy. No data were registered after this date, however DUT was powered and irradiated till 03. 12. 2012. Total dose taken by the device during whole test was 153 Gy Test start FIP communication lost End of irradiation 21. 09. 2012 30. 10. 2012 03. 12. 2012 0 0 0 9. 2 E+11 7 E+11 (6. 6 E+11 logged) 93 1. 52 E+12 1. 1 E+12 153 INTEGRATED 1 Me. V neutron eg. [cm-2] Hadrons >~20 Me. V [cm-2] Dose [Gy] n Weekly (average) 1. 52 E+11 1. 1 E+11 15. 3 During period 21. 09. 2012 - 30. 10. 2012 observed 4 different types of failures ü ü n SEFI: AD 7730 L chip communication error (reading of data from conditioner chip impossible). Action: restart of INPUT ACQUISITION BOARDS SEFI: Fip. ADUC communication lost. Action: remote restart of LSAS crate by power OFF and ON. SEU or SET: glitches in measured input signals. After one FIP communication cycle – the measured data back to proper values. Action: NONE One SEE: FIP communication lost. Action: REMOTE RESTART ATTEMPT (IMPOSSIBLE) – DEVICE COMMUNICATION LOST There was no significant input signal drift for any channel over whole logged period (and after) Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Signal stability of LSAS input channels – CNRAD measurements n There was no significant

Signal stability of LSAS input channels – CNRAD measurements n There was no significant input signal drift for any channel over whole logged period (and after) ü ü ü During data logging period (24. 09. 2012 - 30. 10. 2012) the input signals measured by all channels were stable. Only the CH 7 showed small drift of ~0. 1 V which is negligible After irradiation - the LSAS test crate was checked. Suprisingly, the crate worked normally in local mode (data transfer by RS 232). It was impossible only to start the FIP connection, what may be linkled with micro. FIP chip damage on the Fip. ADUC board Data read by the RS 232 link showed that after TID of 153 Gy almost all input channels values was the same as before the test. Only CH 2 had a drift of ~0. 3 V. Signal of CH 7 with previousely observed drift of ~0. 1 V back to the initial value SAMPLES OF INPUT SIGNAL OVER IRRADIATION TIME COMPARED WITH BEFORE IRRADIATION AND AFTER IRRADIATION: 2012/09/14 17: 00 2012/09/27 16: 46: 21 2012/09/30 14: 17 2012/10/01 07: 54: 22 2012/10/04 15: 56: 09 2012/10/06 22: 41: 07 2012/10/10 00: 53: 36 2012/10/14 11: 15: 38 2012/10/16 03: 04: 14 2012/10/20 04: 31: 13 2012/09/23 13: 40: 19 2012/10/26 11: 06: 05 2012/10/29 07: 29: 37 TID [Gy] 0 14 22 25 33 39 47 57 61 68 76 82 89 2013/02/11 14: 00 153 Time Mateusz Sosin CH 1 [V] CH 2 [V] CH 3 [V] CH 4 [V] CH 5 [V] 0. 8610 0. 8642 0. 8663 0. 8624 0. 8573 0. 8611 0. 8709 0. 8567 0. 8664 0. 8571 0. 8628 0. 8646 0. 8509 -5. 9782 -6. 0460 -5. 9967 -6. 0243 -6. 0104 -6. 0144 -5. 9972 -5. 9189 -5. 9434 -5. 9391 -5. 9613 -5. 9442 -5. 9421 5. 2219 5. 2063 5. 2391 5. 2387 5. 2330 5. 2057 5. 2078 5. 1906 5. 2336 5. 2310 5. 2208 5. 2117 5. 2235 -5. 7922 -5. 7898 -5. 7836 -5. 7715 -5. 7854 -5. 7815 -5. 7899 -5. 7855 -5. 7813 -5. 8024 -5. 8061 -5. 8056 -5. 7701 -0. 6603 -0. 6531 -0. 6430 -0. 6991 -0. 6620 -0. 6518 -0. 6544 -0. 6538 -0. 6602 -0. 6491 -0. 6995 -0. 6549 -0. 6407 0. 84584 -6. 3625 5. 24509 -5. 82695 -0. 67827 CH 6 [V] CH 7 [V] CH 8 [V] 5. 1614 5. 1502 5. 1605 5. 1575 5. 1668 5. 1534 5. 1427 5. 2062 5. 1648 5. 1605 5. 1788 5. 1509 5. 1699 -2. 1033 -2. 0939 -1. 9986 -1. 9921 -2. 0861 -2. 0993 -2. 0671 -2. 0757 -2. 0783 -2. 1099 -1. 9930 -1. 9971 -1. 9999 -4. 5654 -4. 5699 -4. 5255 -4. 5652 -4. 5592 -4. 5692 -4. 5417 -4. 5254 -4. 5295 -4. 5509 -4. 5503 -4. 5657 -4. 5284 5. 154876 -2. 10963 -4. 5402 CH 9 [V] CH 10 [V] CH 11 [V] CH 12 [V] 8. 3708 8. 3506 8. 3343 8. 3425 8. 3459 8. 3437 8. 3527 8. 3250 8. 3385 8. 3443 8. 3638 8. 3676 8. 3438 3. 2637 3. 2867 3. 2532 3. 2629 3. 2888 3. 2748 3. 2808 3. 2872 3. 2702 3. 2786 3. 2761 3. 2893 3. 2781 -0. 1165 -0. 1081 -0. 0894 -0. 1048 -0. 1069 -0. 1067 -0. 1044 -0. 1058 -0. 1041 -0. 1049 -0. 1077 -0. 0842 -0. 0693 -3. 0370 -3. 0463 -2. 9993 -3. 0434 -3. 0421 -3. 0375 -3. 0533 -2. 9923 -3. 0470 -3. 0421 -3. 0433 -3. 0936 -3. 0460 8. 387013 3. 26155 -0. 11086 -3. 0548 Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Single Event Functional Interrupt – CNRAD measurements n AD 7730 L chip communication errors

Single Event Functional Interrupt – CNRAD measurements n AD 7730 L chip communication errors were observed. INPUT STAGE microcontroller couldn’t read one of the 12 input channels circuits. Action taken: INPUT STAGE restart using implemented functionality CHANNEL 1 2 3 4 5 6 7 8 9 10 11 12 TOTAL: n Communication lost with Fip. ADUC card: 9 events occured Action taken: remote restart of LSAS crate n Cross section ü ü ü Mateusz Sosin AD 7730 L COMM ERROR (number of events) 5 4 5 8 21 4 7 6 3 6 2 4 75 He. H fluence 6. 6 E+11 cm-2 Errors (total) 84 Cross section = 84 / 6. 6 E+11 cm-2 =1. 27 E-10 cm 2 Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Single Event Transient or Single Event Upset – CNRAD measurements n Glitches were observed

Single Event Transient or Single Event Upset – CNRAD measurements n Glitches were observed within the input channels measurement data. Glitches appeared only for single FIP cycle. At the next cycle signal returned to correct value CHANNEL n 1 2 3 4 5 6 7 8 9 10 11 12 TOTAL: Possible reasons ü ü ü (1) Single Effect Transient (SET) in AD 7730 L internal analog cirquitry (2) Single Effect Upset (SEU) (bit switch) in AD 7730 L internal RAM or communication register (3) SEU in in INPUT STAGE microcontroller memory (4) SEU in XC 95288 output data register (5) SEU in Fip. ADUC card chips memories 4 5 n Cross section ü 3 ü ü n n Action taken: NONE Non critical for the system functionality Mateusz Sosin Glitches observed (number of events) 32 30 30 59 67 32 71 105 23 33 34 51 567 He. H fluence 6. 6 E+11 cm-2 Errors (total) 567 Cross section = 567/ 6. 6 E+11 cm-2 =8. 6 E-10 cm 2 2 1 Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Power supply (volatges and currents) – CNRAD measurements AFTER IRRADIATION (153 Gy) DIGITAL SUPPLY

Power supply (volatges and currents) – CNRAD measurements AFTER IRRADIATION (153 Gy) DIGITAL SUPPLY (XC 95288, ADUC 834, LEDS) 5. 02 5. 01 69 60 4. 98 4. 81 3. 33 AD 7730 L SUPPLY 261 240 4. 97 4. 37 MOSFETs UDS VOLTAGE DROP 0. 02 0. 147 0. 08 0. 68 BEFORE IRRADIATION +VR 5 [V] IDIG [m. A] +5 VL [V] +3. 3 VL [V] IANALOG [m. A] +5 VD, +5 VA [V] UDS Q 1 [V] UDS Q 2 [V] n DRIFT OBSERVED -0. 01 -9 -0. 17 0. 02 -21 -0. 6 0. 127 0. 6 Possible TID effect observed on power supply MOSFET keys ü Voltage drop on MOSFETs Q 1, Q 2 increased, which may be linked with transistors characteristics change according to TID taken by MOSFETs. However, the drift has not visiblee impact to the operation of LSAS. Also any MOSFETs control problems were observed ü Current consumption for „analog” and „digital” part of INPUT STAGE PCBs decreased, which looks linked with decrease of supply voltages (+5 VL, +5 VD, +5 VA) generated by voltage drop on MOSFETs Q 1, Q 2 Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013

Summary – CNRAD measurements n LSAS crate crossection ü ü ü n Probability of

Summary – CNRAD measurements n LSAS crate crossection ü ü ü n Probability of LSAS crate errors within 1 year of work ü ü n Assuming Total High Energy Hadron Fluence taken by the equipement during logged period 6. 6 E+11 cm-2 The total amount of non-destructive faults were 9 Fip. ADUC stops + 75 AD 7730 L communication lost = 84, Equipement crossection: 84/6. 6 E+11 cm-2 = 1. 27 E-10 cm 2 Assuming Total High Energy Hadron Fluence per year for locations US 15, UA 23, UA 27, UA 83, UA 87, UL 55: 1 x 107 cm-2 8 LSAS crates installed in locations mentioned above Probability of non-destructive fault of equipement will be: P= 8* 1. 27 E-10 cm 2 * 1 E 7 cm-2 = 0. 01 per year Theoretical Mean Time Between Failures for all LSAS installed in LHC will be: MTBF = 100 years Total Ionizing Dose resistance ü ü Assuming Total Ionizing Dose per year for locations US 15, UA 23, UA 27, UA 83, UA 87, UL 55: 0. 1 Gy/year The theoretical LSAS crate lifetime will be 93 Gy / (0. 1 Gy/year) = 930 years Mateusz Sosin Research status of Low-Beta weighting system RADWG, 12. 09. 2013