Lecture 20 OUTLINE The MOSFET contd Longchannel IV

Lecture 20 OUTLINE The MOSFET (cont’d) • Long-channel I-V characteristics Reading: Pierret 17. 2; Hu 6. 6

Derivation of NMOSFET I-V • VD > VS • Current in the channel flows by drift • Channel voltage VC(y) varies continuously between the source and the drain • Channel inversion charge density W EE 130/230 A Fall 2013 Lecture 20, Slide 2 R. F. Pierret, Semiconductor Device Fundamentals, Figs. 17. 6

1 st-Order Approximation • If we neglect the variation of Qdep with y, then where VT is defined to be threshold voltage at the source end: The inversion charge density is then EE 130/230 A Fall 2013 Lecture 20, Slide 3

NMOSFET Current (1 st-order approx. ) • Consider an incremental length dy of the channel. The voltage drop across this region is in the linear region EE 130/230 A Fall 2013 Lecture 20, Slide 4

Saturation Current, IDsat (1 st-order approximation) C. C. Hu, Modern Semiconductor Devices for Integrated Circuits, Figure 6 -16 IDS saturates when VD reaches VG-VT Set VD = VG-VT in the equation for ID EE 130/230 A Fall 2013 Lecture 20, Slide 5

Problem with “Square Law Theory” • Ignores variation in depletion width with distance y: where EE 130/230 A Fall 2013 Lecture 20, Slide 6

Modified (Bulk-Charge) I-V Model In linear region: In saturation region: EE 130/230 A Fall 2013 Lecture 20, Slide 7

MOSFET Threshold Voltage, VT The expression that was previously derived for VT is the gate voltage referenced to the body voltage that is required reach the threshold condition: Usually, the terminal voltages for a MOSFET are all referenced to the source voltage. In this case, and the equations for IDS are EE 130/230 A Fall 2013 Lecture 20, Slide 8

The Body Effect Note that VT is a function of VSB: where g is the body effect parameter When the source-body pn junction is reverse-biased, |VT| is increased. Usually, we want to minimize g so that IDsat will be the same for all transistors in a circuit. EE 130/230 A Fall 2013 Lecture 20, Slide 9

MOSFET VT Measurement • VT can be determined by plotting IDS vs. VGS, using a low value of VDS IDS VGS EE 130/230 A Fall 2013 Lecture 20, Slide 10

Long-Channel MOSFET I-V Summary • In the ON state (VGS>VT for NMOS; VGS<VT for PMOS), the inversion layer at the semiconductor surface forms a “channel” for current to flow by carrier drift from source to drain In the linear region of operation (VDS < (VGS VT)/m): In the saturation region of operation (VDS > (VGS VT)/m): EE 130/230 A Fall 2013 Lecture 20, Slide 11