CMS MPGD Upgrade Electronics 2 P Aspell CERN

CMS MPGD Upgrade …. Electronics 2 P. Aspell CERN April 2011 1

LHC-Upgrade style readout system Front-end detector module Counting room FEFEASIC FE ASIC Trigger DAQ Ser/Des E-link Power Interface and driver board GBT Clock, T 1 commands FE Trig, Data Optical link @ 3. 2 Gbps DCS TTC E-link Elinks 80, 160 or 320 Mbps (40, 20, 10 Elinks/GBT respectively) The GBT is currently foreseen for many LHC upgrades : CMS tracker, HCAL, Atlas tracker, LHCb (all upgrades) Generic projects in CERN for : DC/DC Powering GBT Versatile Link P. Aspell CERN April 2011 2

CMS MPGD upgrade electronics Front-ends VFAT/Gd. SP Counting room Interface and driver board GBT Ser/Des Optical link @ 3. 2 Gbps DC/DC converters ~10 V LV GLIB (Gigabit Link Interface Board) Trigger DAQ DCS TTC Power Supplies HV P. Aspell CERN April 2011 3

CMS MPGD upgrade electronics GEM R. De Oliveira Counting room Front-ends VFAT/Gd. SP P. Aspell et al. Interface and driver board GBT P. Moreira et al. Ser/Des Optical link @ 3. 2 Gbps DC/DC converters F. Faccio/ G. Blanchot et al. F. Vasey et al. GLIB (Gigabit Link Interface Board) P. Vichoudis et al. ~10 V LV Trigger DAQ DCS TTC Power Supplies HV P. Aspell CERN April 2011 4

CMS MPGD upgrade electronics meeting 2 Focus on GEM electrical design Discussion points for ultimate goals : Power delivery through the GEM to the VFATs with a star point ground ? How many electronic routing planes? Routing of e-links from the front-ends to the GBT on the GEM? 3 pairs (SLVDS) per front-end. Front-ends VFAT/Gd. SP GBT Packaged front-end verses hybrid. Optical link @ 3. 2 Gbps Electronics board for the GBT and dc/dc converter. A plug-in or directly on the GEM ? DC/DC converters ~10 V P. Aspell CERN April 2011 5

Common mode issues with GEMs Measurements in Totem T 2 and in the MPGD lab show the minimum threshold is different between detectors and higher than it should be. There appears to be a high level of common mode pickup. Return paths, Grounding and shielding Coupling within the detector Detailed studies on-going in these two areas both in the lab and via simulation. Aim : to arrive at proposals for improvements in : Detector design P. Aspell CERN Grounding, return paths and shielding Front-end design : VFAT 3 GDSP Readout April 2011 6

Problems with existing systems : Potential common mode path – to be avoided -ve vdda HV 0 V vddd A VFAT chip gnda gnddet gndd vdda vddd B VFAT chip gnda gnddet gndd Problem : If hybrid A connector is higher impedance than hybrid B connector then circuit return current would be forced through the gnd. Det route creating common mode noise on A. P. Aspell CERN April 2011 LV power and Signal path

Problems with existing systems : Ground loops !!! HV -ve LV vdda HV 0 V vddd VFAT chip gnda gnddet gndd vdda vddd LV power VFAT chip gnda gnddet gndd Faraday cage Here there are ground loops everywhere which can cause problems. There is no distinction between Ground, Return Paths, Shielding. P. Aspell CERN April 2011

Guidelines : Return currents and shields. No ground loops on Gnd. Det Avoid circuit currents in Gnd. Det. Minimise other ground loops, preferably to zero. No current flow in Faraday Cage (Shield). Minimise impedance of power and return line paths and connectors. P. Aspell CERN April 2011

Options : 1 thick return path Very low impedance connection between hybrid and return plane. -ve vdda vddd HV VFAT chip gnda gnddet gndd vdda vddd VFAT chip gnda gnddet gndd Power ✓ No current in detector shield ✓ No ground loops ✓ Low impedance gnddet and gnda ✗ Analog return currents are in series and could cause common mode unless it is very low impedance. Notes : The LV power is delivered via a power connector on the GEM not to individual hybrids. The gnda and gndd should be separated on the hybrid. P. Aspell CERN April 2011 Signal path only

2 thick return paths Very low impedance connection between hybrid and return plane. -ve vdda vddd HV VFAT chip gnda gnddet gndd vdda vddd VFAT chip gnda gnddet gndd Power ✓ No current in detector shield ✓ No ground loops ✓ Low impedance gnddet and gnda ✗ Analog return currents are in series and could cause common mode unless it is very low impedance. Notes : The LV power is delivered via a power connector on the GEM not to individual hybrids. The gnda and gndd should be separated on the hybrid. P. Aspell CERN April 2011 Signal path only

Separate gnd. Det Very low impedance connection between hybrid and return plane. -ve vdda vddd HV VFAT chip gnda gnddet gndd vdda vddd Signal path only VFAT chip gnda gnddet ✓ ✓ gndd Power connector No current in shield. The return current of one chip can only affect itself not others. No ground loops, the gnddet return is a star configuration with the star point at the power connector. Gnda circuit current cannot flow in gnddet. Notes : The LV power should be removed from the signal path flat cables. The gnddet, gnda and gndd should be separated on the hybrid (requires new hybrid). The gnddet should be run as a star connection. The gnda and gndd could be run as common ground planes between chips. P. Aspell CERN April 2011

Regulators on the detector vdda -ve vddd HV VFAT chip gnda gnddet gndd vdda vddd VFAT chip gnda gnddet gndd An. And Dig. Reg. s HV P. Aspell CERN LV April 2011 Signal path only

General remarks on common mode studies so far. • The minimum threshold problem is higher than it should be due to common mode. • Small improvements have been made in the lab by eliminating ground loops and providing separate power supply. • The min threshold is fine when VFAT is unconnected from the detector irrespective of the hybrid ground connection ie. If gnda and gndd are connected together. • Separating gnda and gndd on the hybrid makes the noise worse in all configurations looked at. • IComp : Reducing IComp helps a lot. This reduces a 30 u. A/channel comparator switching current. • Error discovered on hybrid due to bonding. Comparator O/P stage current is bonded to the analog instead of the digital return. • Desirable design improvements to existing systems: separate power delivery, new hybrid with better connectors, better cables, electrical isolation from readout board ? ? P. Aspell CERN April 2011

VFAT front-end Gnd. Det P. Aspell CERN Gnd. A Gnd. D April 2011

Signal currents for ideal 12 f. C input charge Comparator output voltage Gnd. Det Signal return current ~4 u. A peak ~0. 5 m. A if all channels fire together Gnd. A Analog return current ~25 u. A peak change (~3. 2 u. A all channels fire together) Gndd Digital current ~ 30 u. A movement (3. 8 m. A if all channels fire together) P. Aspell CERN April 2011

For today Brainstorm on how to implement these ideas in the forthcoming prototypes in terms of detector design and hybrid design. P. Aspell CERN April 2011