VELO upgrade Frontend ECS LHCb upgrade electronics meeting

VELO upgrade Front-end ECS LHCb upgrade electronics meeting 12 April 2012 Martin van Beuzekom on behalf of the VELO upgrade group Some thoughts, nothing definite yet

2 VELO upgrade options: Strips and Pixels u u Front-end chips are being designed for both a strip and pixel options We have 21 -26 stations depending on option 1 station = 2 modules, on both sides of beam Strips: double sided module: 20 FE chips per side (R/Phi) n u Pixels: “single” sided module: 12 FE chips n u 2 halves * 21 stations * 2 sides (R/Phi) * 20 chips = 1680 chips, 128 channels each 2 halves * 26 stations * 12 chips = 624 chips, 65 k pixels each In the following I will show the pixel option n because it is more demanding in terms of configuration data l n 40 M pixels versus 256 k strips because I know it better Martin van Beuzekom VELO upgrade ECS, April 12, 2012 2

Pixel module u 12 readout ASICs: VELOpix n u u 4 sensor modules (units), 3 chips each Readout + ECS ‘tape’ either per ASIC, or per 3 ASICS? Up to 12. 2 Gbit/s data from hottest chip -> equivalent to 4*GBT Tx Martin van Beuzekom VELO upgrade ECS, April 12, 2012 3

Where thing are / hopefully will be Current scheme 15 meter copper 1 meter copper balcony control +temp. boards TFC ECS (specs/can) D 3 hybrid repeater boards LV + HV DAQ Upgrade scheme <1 meter copper hybrid vacuum new ‘repeater’ boards TFC + ECS via GBT LV + HV D 3 DAQ air where to put the GBTs, and how many Martin van Beuzekom VELO upgrade ECS, April 12, 2012 4

Where things are (II) u u Electrical <-> Optical conversion always outside of vacuum tank Where to put the ECS/TFC GBTs, in vacuum or outside ? How many ECS/TFC GBTs do we need Non negligible amount of radiation n n u u On flange: 1 Mrad/ 10 years (t. b. c. ) in vacuum: up to 100 Mrad (strongly depends on position) Power dissipation in vacuum should be minimized But number of electrical connections (feedthroughs) also Seems attractive to move the ECS/TFC GBT to the hybrids (vacuum) ‘Repeater’ board houses all others functions n n Electrical <-> optical (for ECS/TFC GBT and for DAQ) LV regulators + sensing/monitoring Temperature sensing FPGA for glue-logic? radiation? do we need it? Martin van Beuzekom VELO upgrade ECS, April 12, 2012 5

option 1: GBT+SCA outside vacuum tank + + - 1 ECS/TFC GBT for 6 VELOpix chips -> 104 ECS/TFC GBT for whole VELO Less power dissipation in vacuum Accessible All monitoring functions in one place via SCA Need low jitter clock transmission for high speed serial links in VELOpix Need many signals on kapton tape (20 -25 per 6 VELOpix chips) new ‘repeater’ hybrid e/o SCA 20 -25 < 1 m. copper Martin van Beuzekom e/o GBT VELO upgrade ECS, April 12, 2012 6

Option 2: GBT+SCA on hybrid u u Electrical -> Optical conversion on air side Copper link at 4. 8 Gbit/s to GBT chip vacuum tank n u 1 GBT for 3 VELOpix chips (maybe 6) n n u u first tests give very good results individual clock per VELOpix available (low jitter) common TFC signals configuration via GBT e-link (being discussed) SCA for monitoring of voltage, temperature etc. Requires extra power in vacuum: VELOpix = 6 x(2 -3)W, GBT+SCA= 2 W? Additional ECS GBT needed for monitoring temp, power on ‘repeater’ n ~10% extra GBTs new ‘repeater’ e/o hybrid e/o SCA GBT < 1 m. copper Martin van Beuzekom VELO upgrade ECS, April 12, 2012 e/o e/o 7

Issues that need further study u Configuration speed n n n u Configuration protocol n n u Assume ~1 Mbit of configuration data per ASIC -> ~600 Mbit for the whole VELO Detailed study of data flow (# of GBT masters etc. ) to be done SPI-like , I 2 C ? trade-off: speed vs complexity How to handle the chip calibration (threshold equalization) n requires (long) sequence of set mask l scan threshold and take data l n n Will take almost forever with standard PVSS stepping mechanism -> Add specific features to VELOpix to speed up this process Martin van Beuzekom VELO upgrade ECS, April 12, 2012 8

BACK-UP SLIDES Martin van Beuzekom VELO upgrade ECS, April 12, 2012 9

VELOpix scratch-page u Signals: n n n n u Clock, low jitter Reset, Bcreset (T 0), Testpulse Enable slow control: SC-data-in, SC-data-out 4 DAQ links at >3. 2 Gbit/s effectively l 8 links at lower speed? extra TFC inputs? analog output? Use the simple (robust) SC interface proposed for the TPX 3? n n can be controlled directly from GBT requires uninterrupted stream of ~500 -800 k bits in ‘one shot’ Martin van Beuzekom VELO upgrade ECS, April 12, 2012 10