Moores Law Electronics 19 April 1965 Moores Original

  • Slides: 11
Download presentation
Moore’s Law Electronics 19 April 1965

Moore’s Law Electronics 19 April 1965

Moore’s Original Data Gordon Moore Electronics 19 April 1965

Moore’s Original Data Gordon Moore Electronics 19 April 1965

Graph of Moore’s Law 11/01/2008 EADS 3

Graph of Moore’s Law 11/01/2008 EADS 3

Graph of Moore’s Law – with MS 11/01/2008 EADS 4

Graph of Moore’s Law – with MS 11/01/2008 EADS 4

Graph of Moore’s Law – with MS Human Intelligence 11/01/2008 EADS 5

Graph of Moore’s Law – with MS Human Intelligence 11/01/2008 EADS 5

Memory bottleneck • The CPU can add two numbers in less than one nanosecond.

Memory bottleneck • The CPU can add two numbers in less than one nanosecond. – If they are both in registers • Putting a number from memory into a register takes about 100 nanoseconds. • “Stall” – the CPU waits on memory. 11/01/2008 EADS 6

Intel Haswell Size/speed 1 K / 1 ns 128 Kb / 5 ns 1

Intel Haswell Size/speed 1 K / 1 ns 128 Kb / 5 ns 1 Mb / 20 ns 4 Gb /125 ns 1 Tb / 1 ms 11/01/2008 EADS 7

GPU architecture • GPUs have much less space devoted to cache. • GPUs have

GPU architecture • GPUs have much less space devoted to cache. • GPUs have multiple (100 -1000) cores, which are simpler, slower processing units. • GPU cores all perform the same instructions, but on different data. • Not all the cores can be active at once. When one stalls, another one starts up. 11/01/2008 EADS 8

GPU and CPU: The Differences Control ALU ALU Cache DRAM CPU GPU More transistors

GPU and CPU: The Differences Control ALU ALU Cache DRAM CPU GPU More transistors devoted to computation, instead of caching or flow control Suitable for data-intensive computation High arithmetic/memory operation ratio

Intel Core i 5 -3470 Ivy Bridge Processor:

Intel Core i 5 -3470 Ivy Bridge Processor:

11/01/2008 EADS 11

11/01/2008 EADS 11