Issues of the Synchronous Digital Hierarchy Twelfth Meeting

Issues of the Synchronous Digital Hierarchy Twelfth Meeting

Network Design Elements l Multiplexer l l l Regenerators l l Rregenerates a perfectly formed signal Add/drop multiplexers (ADMs) l l l Translates STM-1 signals into STM-4, STM-16 or STM-64. Demultiplexes in the opposite direction of transmission. Carries out a switching function with pointer mechanism Drop out’ a VC which can then be replaced (add) with another VC. Cross-connects or Digital Cross Connecs (DXCs) l l Carries out a switching function with pointer mechanism Has both SDH and PDH interfaces, Has large number of switching connections (cross-connects) between these interfaces. Allow large numbers of paths to be interconnected at points of high traffic density.

SDH Network Structure

Vertical Add Drop Multiplexer (ADM) l l l ADMs are installed between STM-1 terminal multiplexers VCs can be dropped out of the STM-1 frame at each of the intermediate (add/drop) nodes. (ADMs) Similarly, other VCs can be added in their place; The total capacity of the path at any point cannot be greater than the STM-1 payload VC-12 can only be added into a vacant position.

Ring Add Drop Multiplexer (ADM) l l Joining the two terminal multiplexers together, Then replace them with ADMs. Access to and from the ring is via the add/drop capability of each ADM Example: l l A and C are connected by fibre-optic cables. Traffic is duplicated and passes around the entire ring, Traffic travels in opposite directions Switching position at A and C only determines that the traffic is added and dropped from the ring.

Restoring traffic in a Ring ADMs l l No manual intervention, in the event of a failure. Full restoration in a few milliseconds Referred to as self-healing. Example: l l l The event of a break in the ring. Immediate switching actions at C passes the traffic to the standby fibre. Why C l The closest node the to the failure

Network Architecture Layer 1 Layer 2 Layer 3

Synchronization l l l Two SDH networks, A and B Each network is running a separate clock An STM-1 line system connecting the two are shown below.

Synchronization: Clock Drift a) The original signal generated in using the clock of network A b) The same signal, that is produced by network A, generated using the clock of network B l This clock drifting cause corruption of data l Buffers are used at the interface to control the differences.

Synchronization: Buffer l l l A buffer is a storage device used in time division multiplexing. Data is ‘written’ into a buffer using clock A Data is ‘read out’ using clock B Buffer size is chosen based timing variations between reading and writing. When will the buffer empty l When clock B is faster than A.

Primary Referencing Clock

Pointer Operation – Controlled Slips l l l The timing of the STM-4 frame is generated by byte-interleaving four VC-4 s, Each VC-4 is contained within an STM-1 frame Example, l l l (a), (b) and (c) – originate from same station as the STM-4; (d) comes into the station on an STM-1 line system. STM-4 will drift apart from the STM-1 signal The buffer approaches its lower limit STM-4 makes a pointer adjustment to the location of VC 4(d). In frame n + 1 This is referred to as wander

Jitter l l l Jitter is a term used to describe the phase variation between signals Reference signal is a bit-stream to be transmitted using a clock pulse Jittered signal is the same bit-stream after it has been transported across an SDH network with the following difference: l l It has pulses that do not line up with the clock. If this clock is used, it will read a ‘ 0’ and not a ‘ 1’ as transmitted

Jitter: De-synchronizer

Bit Error Rate (BER) l l l transmission A sequence of 100 bits There are two bits in error at the end. BER = 2 × 10 -2. Failure if BER >10 -3 Acceptable if 10 -6 < BER < 10 -3 Normal if BER <10 -6

Bit-Interleaved parity (BIP) l l The frame is divided into blocks of bits Organize them in a columns Each column has an extra bit added (even parity of odd parity) Perform a parity check

Error performance l l l l Errored block (EB) – a block in which one or more bits are in error. Errored second (ES) – a 1 second period with one or more errored blocks (includes severely errored seconds during available time). Severely errored second (SES) – a 1 second period that contains 30% or more errored blocks. Background block error (BBE) – an EB in available time not occurring as part of an SES. ES ratio (ESR) – the ratio of ES to total seconds in available time. SES ratio (SESR) – the ratio of SES to total seconds in available time. BBE ratio (BBER) – the ratio of EB to total blocks, excluding SES and unavailable time. Unavailable time – unavailable time commences at the start of a block of ten consecutive SESs, and finishes at the start of a block of ten consecutive seconds, each of which is not an SES. Memorize