CSEE 217 GPU Architecture and Parallel Programming Introduction

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CS/EE 217 – GPU Architecture and Parallel Programming Introduction Daniel Wong, Assistant Professor Department

CS/EE 217 – GPU Architecture and Parallel Programming Introduction Daniel Wong, Assistant Professor Department of Electrical and Computer Engineering Cooperating Faculty, Department of Computer Science and Engineering dwong@ece. ucr. edu

Welcome! 2

Welcome! 2

About me Born and raised in East Los Angeles University of Southern California, Los

About me Born and raised in East Los Angeles University of Southern California, Los Angeles, CA BS Computer Engineering/Computer Science ‘ 09 MS Electrical Engineering ‘ 11 Ph. D Electrical Engineering ’ 15 Research Interest Energy Efficient Computer Systems GPGPUs, Data Centers, NVM Memories Industry Experience Samsung Semiconductor, Inc. , San Jose, CA Lawrence Livermore National Labs, Livermore, CA I’m stuck in California. . . 3

Course Goals Learn how to program GPGPU processors and achieve high performance functionality and

Course Goals Learn how to program GPGPU processors and achieve high performance functionality and maintainability scalability across future generations Technical subjects principles and patterns of parallel algorithms processor architecture features and constraints programming API, tools and techniques 4

Logistics Course Website http: //www. danielwong. org/classes/csee 217 -f 16 Check often for announcements

Logistics Course Website http: //www. danielwong. org/classes/csee 217 -f 16 Check often for announcements Assignments/Projects i. Learn (i. Learn. ucr. edu) Discussion/Help Piazza (https: //piazza. com/ucr/fall 2016/csee 217/home) 5

Textbook 1. D. Kirk and W. Hwu, “Programming Massively Parallel Processors – A Hands

Textbook 1. D. Kirk and W. Hwu, “Programming Massively Parallel Processors – A Hands -on Approach, Second Edition” 2. CUDA by example, Sanders and Kandrot 3. Nvidia CUDA C Programming Guide • https: //docs. nvidia. com/cuda-cprogramming-guide/ 6

Attendance/Grading Attendance You are expected to attend all lectures. Some slides only make sense

Attendance/Grading Attendance You are expected to attend all lectures. Some slides only make sense in lecture. Grade Breakdown Labs: 35% Exam and Final: 45% Project: 30% Class Participation/Extra Credit: 5% 7

Lab Policies 3 slip days 15% penalty per late day If it’s one minute

Lab Policies 3 slip days 15% penalty per late day If it’s one minute late, it’s still late No extensions will be given All labs/projects are due at the end of the due date (midnight) Projects should be uploaded to i. Learn 8

Team Projects Work can be divided up between team members in any way that

Team Projects Work can be divided up between team members in any way that works for you However, each team member will demo the final checkpoint of each project individually, and will get a separate demo grade This will include questions on the entire design Rationale: if you don’t know enough about the whole design to answer questions on it, you aren’t involved enough in the project 9

Contact Instructor: Daniel Wong Email: dwong@ece. ucr. edu Homepage: http: //www. danielwong. org Office:

Contact Instructor: Daniel Wong Email: dwong@ece. ucr. edu Homepage: http: //www. danielwong. org Office: WCH 425 Office Hours: TBD TA: Amir. Ali Abdolrashidi Email: aabdo 001@ucr. edu Office Hours: TBD 10